Shuo Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80578?usp=email )
Change subject: soc/intel/xeon_sp: Add support for is_ioat_iio_stack_res ......................................................................
soc/intel/xeon_sp: Add support for is_ioat_iio_stack_res
IOAT is the term for the on-chip accelerator technology of Xeon-SP. In CPX and SPR, IOAT stack is also named as DINO stack. Different SoC has different check criteria for IOAT stacks, this patch introduces an util function to abstract these differences as well as cleaning up the usage of names.
TEST=intel/archercity CRB
Change-Id: I376928ad89b68b294734000678dad6f070d3c97d Signed-off-by: Shuo Liu shuo.liu@intel.com --- M src/soc/intel/xeon_sp/cpx/soc_util.c M src/soc/intel/xeon_sp/include/soc/util.h M src/soc/intel/xeon_sp/skx/soc_util.c M src/soc/intel/xeon_sp/spr/ioat.c M src/soc/intel/xeon_sp/spr/soc_acpi.c M src/soc/intel/xeon_sp/spr/soc_util.c M src/soc/intel/xeon_sp/uncore_acpi.c 7 files changed, 26 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/80578/1
diff --git a/src/soc/intel/xeon_sp/cpx/soc_util.c b/src/soc/intel/xeon_sp/cpx/soc_util.c index 836cd0c..8c52925 100644 --- a/src/soc/intel/xeon_sp/cpx/soc_util.c +++ b/src/soc/intel/xeon_sp/cpx/soc_util.c @@ -35,6 +35,11 @@ return res->Personality == TYPE_UBOX; }
+bool is_ioat_iio_stack_res(const STACK_RES *res) +{ + return res->Personality == TYPE_DINO; +} + uint8_t get_stack_busno(const uint8_t stack) { if (stack >= MAX_IIO_STACK) { diff --git a/src/soc/intel/xeon_sp/include/soc/util.h b/src/soc/intel/xeon_sp/include/soc/util.h index 89cc501..43bf9d6 100644 --- a/src/soc/intel/xeon_sp/include/soc/util.h +++ b/src/soc/intel/xeon_sp/include/soc/util.h @@ -25,6 +25,7 @@ void get_iiostack_info(struct iiostack_resource *info); bool is_pcie_iio_stack_res(const STACK_RES *res); bool is_ubox_stack_res(const STACK_RES *res); +bool is_ioat_iio_stack_res(const STACK_RES *res); void bios_done_msr(void *unused);
#endif diff --git a/src/soc/intel/xeon_sp/skx/soc_util.c b/src/soc/intel/xeon_sp/skx/soc_util.c index 3e02999..61b6ac4 100644 --- a/src/soc/intel/xeon_sp/skx/soc_util.c +++ b/src/soc/intel/xeon_sp/skx/soc_util.c @@ -78,7 +78,11 @@ * B(31):30.1 8086:2081 * B(31):30.2 8086:2082 */ + return false; +}
+bool is_ioat_iio_stack_res(const STACK_RES *res) +{ return false; }
diff --git a/src/soc/intel/xeon_sp/spr/ioat.c b/src/soc/intel/xeon_sp/spr/ioat.c index 60936a8..0d81d0d 100644 --- a/src/soc/intel/xeon_sp/spr/ioat.c +++ b/src/soc/intel/xeon_sp/spr/ioat.c @@ -86,7 +86,7 @@
/* The FSP HOB doesn't provide accurate information about the resource allocation. Hence use pre-defined offsets. Based - on ACPI code in create_dsdt_dino_resource(), soc_acpi.c: */ + on ACPI code in create_dsdt_ioat_resource(), soc_acpi.c: */ resource_t mem64_base, mem64_limit, bus_base, bus_limit;
/* CPM0 */ diff --git a/src/soc/intel/xeon_sp/spr/soc_acpi.c b/src/soc/intel/xeon_sp/spr/soc_acpi.c index a48302c..ca1cdf9 100644 --- a/src/soc/intel/xeon_sp/spr/soc_acpi.c +++ b/src/soc/intel/xeon_sp/spr/soc_acpi.c @@ -189,7 +189,7 @@ acpigen_pop_len(); }
-static void create_dsdt_dino_resource(uint8_t socket, uint8_t stack, const STACK_RES *ri, bool stack_enabled) +static void create_dsdt_ioat_resource(uint8_t socket, uint8_t stack, const STACK_RES *ri, bool stack_enabled) { if (!stack_enabled) return; @@ -381,7 +381,7 @@ stack_enabled); create_dsdt_stack_sta(socket, stack, ri, stack_enabled); } else if (stack >= IioStack8 && stack <= IioStack11) { // TYPE_DINO - create_dsdt_dino_resource(socket, stack, ri, stack_enabled); + create_dsdt_ioat_resource(socket, stack, ri, stack_enabled); create_dsdt_stack_sta(socket, stack, ri, stack_enabled); } else if (stack == IioStack13) { // TYPE_UBOX create_dsdt_ubox_resource(socket, stack, ri, stack_enabled); diff --git a/src/soc/intel/xeon_sp/spr/soc_util.c b/src/soc/intel/xeon_sp/spr/soc_util.c index a2516df..344fa5b 100644 --- a/src/soc/intel/xeon_sp/spr/soc_util.c +++ b/src/soc/intel/xeon_sp/spr/soc_util.c @@ -78,6 +78,11 @@ return res->Personality == TYPE_UBOX; }
+bool is_ioat_iio_stack_res(const STACK_RES *res) +{ + return res->Personality == TYPE_DINO; +} + /* * Given a stack resource, figure out whether the corresponding stack has * CXL device. diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c index 75b281b..a6e6908 100644 --- a/src/soc/intel/xeon_sp/uncore_acpi.c +++ b/src/soc/intel/xeon_sp/uncore_acpi.c @@ -336,8 +336,8 @@ }
#if CONFIG(SOC_INTEL_SAPPHIRERAPIDS_SP) || CONFIG(SOC_INTEL_COOPERLAKE_SP) - // Add DINO End Points (with memory resources. We don't report every End Point device.) - if (ri->Personality == TYPE_DINO) { + // Add IOAT End Points (with memory resources. We don't report every End Point device.) + if (is_ioat_iio_stack_res(ri)) { for (int b = ri->BusBase; b <= ri->BusLimit; ++b) { struct device *dev = pcidev_path_on_bus(b, PCI_DEVFN(0, 0)); while (dev) { @@ -488,9 +488,9 @@ return current; }
-/* Skylake-SP doesn't have DINO but not sure how to verify this on CPX */ +/* Skylake-SP doesn't have IOAT but not sure how to verify this on CPX */ #if CONFIG(SOC_INTEL_SAPPHIRERAPIDS_SP) || CONFIG(SOC_INTEL_COOPERLAKE_SP) -static unsigned long xeonsp_create_satc_dino(unsigned long current, const STACK_RES *ri) +static unsigned long xeonsp_create_satc_ioat(unsigned long current, const STACK_RES *ri) { for (int b = ri->BusBase; b <= ri->BusLimit; ++b) { struct device *dev = pcidev_path_on_bus(b, PCI_DEVFN(0, 0)); @@ -517,15 +517,15 @@ // Add the SATC header current += acpi_create_dmar_satc(current, 0, 0);
- // Find the DINO devices on each socket + // Find the IOAT devices on each socket for (int socket = CONFIG_MAX_SOCKET - 1; socket >= 0; --socket) { if (!soc_cpu_is_enabled(socket)) continue; for (int stack = (MAX_LOGIC_IIO_STACK - 1); stack >= 0; --stack) { const STACK_RES *ri = &hob->PlatformData.IIO_resource[socket].StackRes[stack]; - // Add the DINO ATS devices to the SATC - if (ri->Personality == TYPE_DINO) - current = xeonsp_create_satc_dino(current, ri); + // Add the IOAT ATS devices to the SATC + if (is_ioat_iio_stack_res(ri)) + current = xeonsp_create_satc_ioat(current, ri); } }