[S] Change in coreboot[master]: soc/mediatek/mt8186: Lower SPI NOR frequency from 52Mhz to 39Mhz

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Hung-Te Lin, Bayi Cheng.

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68659 )

Change subject: soc/mediatek/mt8186: Lower SPI NOR frequency from 52Mhz to 39Mhz
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Patch Set 1:

(1 comment)

Commit Message:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160955):
https://review.coreboot.org/c/coreboot/+/68659/comment/2c61000c_24b7b1c8 
PS1, Line 14: We change the NOR flash clcok parent and adjust the clock from 52M to 39M
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