Change in coreboot[master]: soc/intel/tigerlake: Update GPIOs for Tigerlake SOC

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36248 )

Change subject: soc/intel/tigerlake: Update GPIOs for Tigerlake SOC
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Patch Set 3:

(2 comments)

https://review.coreboot.org/c/coreboot/+/36248/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/36248/3//COMMIT_MSG@30 
PS3, Line 30: BUG=None
> no need to write bug or branch as we are in master but test is must

How can BUG be none when this commit fixes broken PMC?

https://review.coreboot.org/c/coreboot/+/36248/3/src/soc/intel/tigerlake/inc... 
File src/soc/intel/tigerlake/include/soc/pmc.h:

https://review.coreboot.org/c/coreboot/+/36248/3/src/soc/intel/tigerlake/inc... 
PS3, Line 21: #define  ABASE			0x40
looks like this is important and PMC was broken before