Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42676 )
Change subject: util/mb/google/tmpl/puff: Fix overridetree.cb to swap USB ports ......................................................................
util/mb/google/tmpl/puff: Fix overridetree.cb to swap USB ports
Switch USB2 port1 and port3 due to circuit change from rev0.
BUG=b:154071868,b:154585046,b:156429564 BRANCH=none TEST=none
Change-Id: I5b9a20bd657ed587ec891e52f66629d554df6166 Signed-off-by: Edward O'Callaghan quasisec@google.com --- M util/mainboard/google/puff/template/overridetree.cb 1 file changed, 9 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/42676/1
diff --git a/util/mainboard/google/puff/template/overridetree.cb b/util/mainboard/google/puff/template/overridetree.cb index ededac4..55ce5ea 100644 --- a/util/mainboard/google/puff/template/overridetree.cb +++ b/util/mainboard/google/puff/template/overridetree.cb @@ -21,9 +21,6 @@ }"
# USB configuration - # NOTE: This only applies to Puff, - # usb2_ports[1] and usb2_ports[3] were swapped on - # reference schematics after Puff has been built. register "usb2_ports[0]" = "{ .enable = 1, .ocpin = OC2, @@ -32,7 +29,14 @@ .pre_emp_bias = USB2_BIAS_11P25MV, .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, }" # Type-A Port 2 - register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port + register "usb2_ports[1]" = "{ + .enable = 1, + .ocpin = OC1, + .tx_bias = USB2_BIAS_0MV, + .tx_emp_enable = USB2_PRE_EMP_ON, + .pre_emp_bias = USB2_BIAS_28P15MV, + .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, + }" # Type-A Port 1 register "usb2_ports[2]" = "{ .enable = 1, .ocpin = OC3, @@ -41,14 +45,7 @@ .pre_emp_bias = USB2_BIAS_28P15MV, .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, }" # Type-A Port 3 - register "usb2_ports[3]" = "{ - .enable = 1, - .ocpin = OC1, - .tx_bias = USB2_BIAS_0MV, - .tx_emp_enable = USB2_PRE_EMP_ON, - .pre_emp_bias = USB2_BIAS_28P15MV, - .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, - }" # Type-A Port 1 + register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port register "usb2_ports[4]" = "{ .enable = 1, .ocpin = OC_SKIP,
Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42676 )
Change subject: util/mb/google/tmpl/puff: Fix overridetree.cb to swap USB ports ......................................................................
Patch Set 1: Code-Review+2
Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42676 )
Change subject: util/mb/google/tmpl/puff: Fix overridetree.cb to swap USB ports ......................................................................
Patch Set 1: Code-Review+2
Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42676 )
Change subject: util/mb/google/tmpl/puff: Fix overridetree.cb to swap USB ports ......................................................................
util/mb/google/tmpl/puff: Fix overridetree.cb to swap USB ports
Switch USB2 port1 and port3 due to circuit change from rev0.
BUG=b:154071868,b:154585046,b:156429564 BRANCH=none TEST=none
Change-Id: I5b9a20bd657ed587ec891e52f66629d554df6166 Signed-off-by: Edward O'Callaghan quasisec@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42676 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Sam McNally sammc@google.com Reviewed-by: Paul Fagerburg pfagerburg@chromium.org --- M util/mainboard/google/puff/template/overridetree.cb 1 file changed, 9 insertions(+), 12 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Fagerburg: Looks good to me, approved Sam McNally: Looks good to me, approved
diff --git a/util/mainboard/google/puff/template/overridetree.cb b/util/mainboard/google/puff/template/overridetree.cb index ededac4..55ce5ea 100644 --- a/util/mainboard/google/puff/template/overridetree.cb +++ b/util/mainboard/google/puff/template/overridetree.cb @@ -21,9 +21,6 @@ }"
# USB configuration - # NOTE: This only applies to Puff, - # usb2_ports[1] and usb2_ports[3] were swapped on - # reference schematics after Puff has been built. register "usb2_ports[0]" = "{ .enable = 1, .ocpin = OC2, @@ -32,7 +29,14 @@ .pre_emp_bias = USB2_BIAS_11P25MV, .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, }" # Type-A Port 2 - register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port + register "usb2_ports[1]" = "{ + .enable = 1, + .ocpin = OC1, + .tx_bias = USB2_BIAS_0MV, + .tx_emp_enable = USB2_PRE_EMP_ON, + .pre_emp_bias = USB2_BIAS_28P15MV, + .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, + }" # Type-A Port 1 register "usb2_ports[2]" = "{ .enable = 1, .ocpin = OC3, @@ -41,14 +45,7 @@ .pre_emp_bias = USB2_BIAS_28P15MV, .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, }" # Type-A Port 3 - register "usb2_ports[3]" = "{ - .enable = 1, - .ocpin = OC1, - .tx_bias = USB2_BIAS_0MV, - .tx_emp_enable = USB2_PRE_EMP_ON, - .pre_emp_bias = USB2_BIAS_28P15MV, - .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, - }" # Type-A Port 1 + register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port register "usb2_ports[4]" = "{ .enable = 1, .ocpin = OC_SKIP,