[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till romstage

[Subrata Banik (Code Review)]

Attention is currently required from: Cliff Huang, Jérémy Compostella, Ravishankar Sarawadi, Saurabh Mishra.

Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83635?usp=email )

Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till romstage
......................................................................

Patch Set 64:

(4 comments)

File src/soc/intel/pantherlake/Kconfig:

https://review.coreboot.org/c/coreboot/+/83635/comment/05305031_f104243c?usp... :
PS64, Line 152: config SOC_INTEL_I3C_DEV_MAX
              : 	int
              : 	default 2
I don't see any consumer

File src/soc/intel/pantherlake/Makefile.mk:

https://review.coreboot.org/c/coreboot/+/83635/comment/b916ce59_37d3e55f?usp... :
PS64, Line 14: p2sb.c
> p2sb.c is a PCI driver, ideally only required in ramstage and smm. I don't understand why you have added p2sb.c

https://review.coreboot.org/c/coreboot/+/83489 I have dropped this file recently from MTL with an understanding that we don't need to call into any P2SB APIs that resides into the SoC layer.

https://review.coreboot.org/c/coreboot/+/83635/comment/444f243b_5ea41f62?usp... :
PS64, Line 19: 
You will be needing below files as well. Please consider adding.

```
romstage-y += pcie_rp.c
romstage-y += soc_info.c
```

File src/soc/intel/pantherlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/83635/comment/ff227b59_b7d9156d?usp... :
PS64, Line 165: 	const struct soc_intel_pantherlake_config *config;
              : 	FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
              : 	FSPM_ARCH2_UPD *arch_upd = &mupd->FspmArchUpd;
              : 	if (CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER)) {
              : 		if (CONFIG(CONSOLE_SERIAL) && CONFIG(FSP_ENABLE_SERIAL_DEBUG)) {
              : 			enum fsp_log_level log_level = fsp_map_console_log_level();
              : 			arch_upd->FspEventHandler = (uintptr_t)((FSP_EVENT_HANDLER *)
              : 					fsp_debug_event_handler);
              : 			/* Set Serial debug message level */
              : 			(void)log_level; /*TODO: Update with actual implementation */
              : 			/* Set MRC debug level */
              : 		} else {
              : 			/* Disable Serial debug message */
              : 			/* Disable MRC debug message */
              : 		}
              : 	}
              : 	config = config_of_soc();
              : 
              : 	soc_memory_init_params(m_cfg, config);
              : 	mainboard_memory_init_params(mupd);
> doesn't make sense to have multiple TODO w/o actual UPD, better you don't implement this function and keep just a placeholde.

```
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
{
   /* TODO: Placeholder for overriding FSP-M UPDs */
}
```