[S] Change in coreboot[master]: soc/intel/xeon_sp/spr: Fix memory max capacity per processor

[Ziang Wang (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Eric Lai, Felix Singer, Lean Sheng Tan, Patrick Rudolph, Paul Menzel, Tim Chu, Ziang Wang.

Hello Arthur Heymans, Christian Walter, Felix Singer, Johnny Lin, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Paul Menzel, Tim Chu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/75740?usp=email

to look at the new patch set (#6).

The following approvals got outdated and were removed:
Code-Review+2 by Lean Sheng Tan, Verified+1 by build bot (Jenkins)

Change subject: soc/intel/xeon_sp/spr: Fix memory max capacity per processor
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soc/intel/xeon_sp/spr: Fix memory max capacity per processor

The capacity shall be 6*TiB per processor. Tested on SPR-SP EagleStream
Platform, this patch corrects the mem capacity shown in SMBIOS type17.

Change-Id: Ieb892d3b148291b35808d634d63b58b90d456767
Signed-off-by: Hao Wang 
Signed-off-by: Ziang Wang 
---
M src/soc/intel/xeon_sp/spr/romstage.c
1 file changed, 10 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/75740/6