Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61792 )
Change subject: drivers/fsp/fsp2_0: Rework FSP Notify Phase API configs ......................................................................
drivers/fsp/fsp2_0: Rework FSP Notify Phase API configs
This patch renames all FSP Notify Phase API configs to primarily remove "SKIP_" prefix.
1. SKIP_FSP_NOTIFY_PHASE_AFTER_PCI_ENUM -> USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM 2. SKIP_FSP_NOTIFY_PHASE_READY_TO_BOOT -> USE_FSP_NOTIFY_PHASE_READY_TO_BOOT 3. SKIP_FSP_NOTIFY_PHASE_END_OF_FIRMWARE -> USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE
The idea here is to let FSP conditionally execute FSP Notify Phase APIs unless SoC users overrides (with `default n`) those configs to run native coreboot implementation as part of the `.final` ops.
BUG=b:211954778 TEST=Able to build and boot brya.
Signed-off-by: Subrata Banik subratabanik@google.com Change-Id: Ib95368872acfa3c49dad4eb7d0d73fca04b4a1fb --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/notify.c 2 files changed, 29 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/61792/1
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 2992b4f..4b3213c 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -310,41 +310,46 @@ SoC users to select this Kconfig to set EnableMultiPhaseSiliconInit to enable and execute FspMultiPhaseSiInit() API.
-config SKIP_FSP_NOTIFY_PHASE_AFTER_PCI_ENUM - bool +config USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM + bool "Perform Notify Phase (Post PCI enumeration) by FSP" + default y help The FSP API is used to notify the FSP about different phases in the boot process. The current FSP specification supports three notify phases: - Post PCI enumeration - Ready to Boot - End of Firmware - Select this on a platform where you want to skip calling FSP Notify - `Post PCI enumeration` API. Instead use coreboot native implementations + This option allows FSP to execute Notify Phase API (Post PCI enumeration). + SoC users can override this config to use coreboot native implementations + to perform the required lock down and chipset register configuration prior + to executing any 3rd-party code during PCI enumeration (i.e. Option ROM). + +config USE_FSP_NOTIFY_PHASE_READY_TO_BOOT + bool "Perform Notify Phase (Ready to Boot) by FSP" + default y + help + The FSP API is used to notify the FSP about different phases in the boot process. + The current FSP specification supports three notify phases: + - Post PCI enumeration + - Ready to Boot + - End of Firmware + This option allows FSP to execute Notify Phase API (Ready to Boot). + SoC users can override this config to use coreboot native implementations to perform the required lock down and chipset register configuration prior boot to payload.
-config SKIP_FSP_NOTIFY_PHASE_READY_TO_BOOT - bool +config USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE + bool "Perform Notify Phase (End of Firmware) by FSP" + default y help The FSP API is used to notify the FSP about different phases in the boot process. The current FSP specification supports three notify phases: - Post PCI enumeration - Ready to Boot - End of Firmware - Select this on a platform where you want to skip calling FSP Notify `Ready to Boot` - API. Instead use coreboot native implementations to perform the required lock down - and chipset register configuration prior boot to payload. - -config SKIP_FSP_NOTIFY_PHASE_END_OF_FIRMWARE - bool - help - The FSP API is used to notify the FSP about different phases in the boot process. - The current FSP specification supports three notify phases: - - Post PCI enumeration - - Ready to Boot - - End of Firmware - Select this on a platform where you want to skip calling FSP Notify `End of Firmware` - API. Instead use coreboot native implementations to perform the required lock down - and chipset register configuration prior boot to payload. + This option allows FSP to execute Notify Phase API (End of Firmware). + SoC users can override this config to use coreboot native implementations + to perform the required lock down and chipset register configuration prior + boot to payload.
endif diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c index 36b538f..30d61c9 100644 --- a/src/drivers/intel/fsp2_0/notify.c +++ b/src/drivers/intel/fsp2_0/notify.c @@ -20,7 +20,7 @@ static const struct fsp_notify_phase_data notify_data[] = { { .notify_phase = AFTER_PCI_ENUM, - .skip = CONFIG(SKIP_FSP_NOTIFY_PHASE_AFTER_PCI_ENUM), + .skip = !CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM), .post_code_before = POST_FSP_NOTIFY_BEFORE_ENUMERATE, .post_code_after = POST_FSP_NOTIFY_AFTER_ENUMERATE, .timestamp_before = TS_FSP_BEFORE_ENUMERATE, @@ -28,7 +28,7 @@ }, { .notify_phase = READY_TO_BOOT, - .skip = CONFIG(SKIP_FSP_NOTIFY_PHASE_READY_TO_BOOT), + .skip = !CONFIG(USE_FSP_NOTIFY_PHASE_READY_TO_BOOT), .post_code_before = POST_FSP_NOTIFY_BEFORE_FINALIZE, .post_code_after = POST_FSP_NOTIFY_AFTER_FINALIZE, .timestamp_before = TS_FSP_BEFORE_FINALIZE, @@ -36,7 +36,7 @@ }, { .notify_phase = END_OF_FIRMWARE, - .skip = CONFIG(SKIP_FSP_NOTIFY_PHASE_END_OF_FIRMWARE), + .skip = !CONFIG(USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE), .post_code_before = POST_FSP_NOTIFY_BEFORE_END_OF_FIRMWARE, .post_code_after = POST_FSP_NOTIFY_AFTER_END_OF_FIRMWARE, .timestamp_before = TS_FSP_BEFORE_END_OF_FIRMWARE,