Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71679 )
Change subject: soc/amd: Remove dummy SOC_SPECIFIC_OPTIONS ......................................................................
soc/amd: Remove dummy SOC_SPECIFIC_OPTIONS
Change-Id: I080b7b579338c3cf342beabda54f43f525d8b65c Signed-off-by: Elyes Haouas ehaouas@noos.fr --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/glinda/Kconfig M src/soc/amd/mendocino/Kconfig M src/soc/amd/morgana/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig 6 files changed, 45 insertions(+), 53 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/71679/1
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 30e3e73..0de2ab7 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -2,13 +2,6 @@
config SOC_AMD_CEZANNE bool - help - AMD Cezanne support - -if SOC_AMD_CEZANNE - -config SOC_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -83,6 +76,10 @@ select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI + help + AMD Cezanne support + +if SOC_AMD_CEZANNE
config CHIPSET_DEVICETREE string diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig index 5bf1d5f..f4f49b9 100644 --- a/src/soc/amd/glinda/Kconfig +++ b/src/soc/amd/glinda/Kconfig @@ -5,13 +5,6 @@
config SOC_AMD_GLINDA bool - help - AMD Glinda support - -if SOC_AMD_GLINDA - -config SOC_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -88,6 +81,10 @@ select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI + help + AMD Glinda support + +if SOC_AMD_GLINDA
config CHIPSET_DEVICETREE string diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig index 142165c..4dd0eaf 100644 --- a/src/soc/amd/mendocino/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -4,24 +4,6 @@
config SOC_AMD_REMBRANDT_BASE bool - -config SOC_AMD_MENDOCINO - bool - select SOC_AMD_REMBRANDT_BASE - help - AMD Mendocino support - -config SOC_AMD_REMBRANDT - bool - select SOC_AMD_REMBRANDT_BASE - help - AMD Rembrandt support - - -if SOC_AMD_REMBRANDT_BASE - -config SOC_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -103,6 +85,21 @@ select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI
+config SOC_AMD_MENDOCINO + bool + select SOC_AMD_REMBRANDT_BASE + help + AMD Mendocino support + +config SOC_AMD_REMBRANDT + bool + select SOC_AMD_REMBRANDT_BASE + help + AMD Rembrandt support + + +if SOC_AMD_REMBRANDT_BASE + config CHIPSET_DEVICETREE string default "soc/amd/mendocino/chipset_mendocino.cb" if SOC_AMD_MENDOCINO diff --git a/src/soc/amd/morgana/Kconfig b/src/soc/amd/morgana/Kconfig index 7765f92..1106a46 100644 --- a/src/soc/amd/morgana/Kconfig +++ b/src/soc/amd/morgana/Kconfig @@ -5,13 +5,6 @@
config SOC_AMD_MORGANA bool - help - AMD Morgana support - -if SOC_AMD_MORGANA - -config SOC_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -88,6 +81,10 @@ select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI + help + AMD Morgana support + +if SOC_AMD_MORGANA
config CHIPSET_DEVICETREE string diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 765ac4c..b18868d 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -2,13 +2,6 @@
config SOC_AMD_PICASSO bool - help - AMD Picasso support - -if SOC_AMD_PICASSO - -config CPU_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ADD_FSP_BINARIES if USE_AMD_BLOBS select ARCH_X86 @@ -76,6 +69,10 @@ select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI select HAVE_EXP_X86_64_SUPPORT + help + AMD Picasso support + +if SOC_AMD_PICASSO
config CHIPSET_DEVICETREE string diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 01800c1..12d66c4 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -2,13 +2,6 @@
config SOC_AMD_STONEYRIDGE bool - help - AMD support for SOCs in Family 15h Models 60h-6Fh and Models 70h-7Fh. - -if SOC_AMD_STONEYRIDGE - -config CPU_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -51,6 +44,10 @@ select TSC_SYNC_LFENCE select USE_DDR4 select X86_AMD_FIXED_MTRRS + help + AMD support for SOCs in Family 15h Models 60h-6Fh and Models 70h-7Fh. + +if SOC_AMD_STONEYRIDGE
config AMD_APU_STONEYRIDGE bool
-
Elyes Haouas (Code Review)