[S] Change in coreboot[master]: cpu/intel/haswell: Do not include useless µcode updates

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67524 )

Change subject: cpu/intel/haswell: Do not include useless µcode updates
......................................................................

cpu/intel/haswell: Do not include useless µcode updates

There are two types of Haswell/Broadwell platforms: Trad(itional) with
separate CPU and PCH packages, and ULT/ULX where the CPU and PCH share
one package. Mainboards can specify which platform type they are using
the `INTEL_LYNXPOINT_LP` Kconfig option. There are so many differences
between Trad and ULT/ULX that it's not worth doing runtime detection.

The CPUIDs are different for Trad and ULT/ULX platforms, and so are the
µcode updates. So, including Trad µcode updates in a coreboot image for
an ULT/ULX mainboard makes no sense, and vice versa.

Adapt the Makefile so that only relevant µcode updates are added. Also,
add a few comments to indicate which updates correspond to which CPUs.

TEST=Run binwalk on coreboot.rom to verify included µcode updates for:
     - Asrock B85M Pro4 (Haswell Trad)
     - HP Folio 9480M (Haswell ULT/ULX)
     - Purism Librem BDW (Broadwell ULT/ULX)

Change-Id: I6dc9e94ce9fede15cbcbe6be577c48c197a9212a
Signed-off-by: Angel Pons 
---
M src/cpu/intel/haswell/Makefile.inc
1 file changed, 35 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/67524/1

diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc
index b425efd..19b268e 100644
--- a/src/cpu/intel/haswell/Makefile.inc
+++ b/src/cpu/intel/haswell/Makefile.inc
@@ -18,9 +18,14 @@
 subdirs-y += ../microcode
 subdirs-y += ../turbo

-cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*)
+ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
+# Haswell ULT/ULX
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-45-*)
-
 ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
+# Broadwell ULT/ULX
 cpu_microcode_bins += 3rdparty/blobs/soc/intel/broadwell/microcode.bin
 endif
+else
+# Haswell Trad
+cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*)
+endif