Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69118 )
Change subject: cpu/amd/agesa: Remove leftover code ......................................................................
cpu/amd/agesa: Remove leftover code
Now that all agesa CPUs are removed this code is unused.
Change-Id: If0c082bbdb09457e3876962fa75725add11cb67c Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/amd/Kconfig M src/cpu/amd/Makefile.inc D src/cpu/amd/agesa/Kconfig D src/cpu/amd/agesa/Makefile.inc D src/cpu/amd/smm/Makefile.inc D src/cpu/amd/smm/smm_init.c 6 files changed, 12 insertions(+), 118 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/69118/1
diff --git a/src/cpu/amd/Kconfig b/src/cpu/amd/Kconfig index db8989d..0369ebd 100644 --- a/src/cpu/amd/Kconfig +++ b/src/cpu/amd/Kconfig @@ -1,2 +1 @@ -source "src/cpu/amd/agesa/Kconfig" source "src/cpu/amd/pi/Kconfig" diff --git a/src/cpu/amd/Makefile.inc b/src/cpu/amd/Makefile.inc index 5c07a66..94089bd 100644 --- a/src/cpu/amd/Makefile.inc +++ b/src/cpu/amd/Makefile.inc @@ -1,2 +1 @@ -subdirs-$(CONFIG_CPU_AMD_AGESA) += agesa subdirs-$(CONFIG_CPU_AMD_PI) += pi diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig deleted file mode 100644 index d46d2ed..0000000 --- a/src/cpu/amd/agesa/Kconfig +++ /dev/null @@ -1,45 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -config CPU_AMD_AGESA - bool - default n - select ARCH_X86 - select DRIVERS_AMD_PI - select TSC_SYNC_LFENCE - select UDELAY_LAPIC - select LAPIC_MONOTONIC_TIMER - select SPI_FLASH if HAVE_ACPI_RESUME - select SSE2 - select CACHE_MRC_SETTINGS - -if CPU_AMD_AGESA - -config UDELAY_LAPIC_FIXED_FSB - int - default 200 - -# TODO: Sync these with definitions in AGESA vendorcode. -# DCACHE_RAM_BASE must equal BSP_STACK_BASE_ADDR. -# DCACHE_RAM_SIZE must equal BSP_STACK_SIZE. - -config DCACHE_RAM_BASE - hex - default 0x30000 - -config DCACHE_RAM_SIZE - hex - default 0x10000 - -config DCACHE_BSP_STACK_SIZE - hex - default 0x4000 - -config ENABLE_MRC_CACHE - bool "Use cached memory configuration" - default n - select SPI_FLASH - help - Try to restore memory training results - from non-volatile memory. - -endif # CPU_AMD_AGESA diff --git a/src/cpu/amd/agesa/Makefile.inc b/src/cpu/amd/agesa/Makefile.inc deleted file mode 100644 index ac16e00..0000000 --- a/src/cpu/amd/agesa/Makefile.inc +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY14) += family14 -subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15_TN) += family15tn -subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY16_KB) += family16kb - -romstage-y += ../../../soc/amd/common/block/cpu/smm/smm_helper.c -postcar-y += ../../../soc/amd/common/block/cpu/smm/smm_helper.c -ramstage-y += ../../../soc/amd/common/block/cpu/smm/smm_helper.c diff --git a/src/cpu/amd/smm/Makefile.inc b/src/cpu/amd/smm/Makefile.inc deleted file mode 100644 index 97a6694..0000000 --- a/src/cpu/amd/smm/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ - -ramstage-y += smm_init.c diff --git a/src/cpu/amd/smm/smm_init.c b/src/cpu/amd/smm/smm_init.c deleted file mode 100644 index 75dd4506..0000000 --- a/src/cpu/amd/smm/smm_init.c +++ /dev/null @@ -1,60 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <cpu/x86/msr.h> -#include <cpu/x86/mtrr.h> -#include <cpu/amd/mtrr.h> -#include <cpu/amd/msr.h> -#include <cpu/x86/cache.h> -#include <cpu/x86/smm.h> -#include <cpu/x86/smi_deprecated.h> -#include <string.h> - -void smm_init(void) -{ - msr_t msr, syscfg_orig, mtrr_aseg_orig; - - /* Back up MSRs for later restore */ - syscfg_orig = rdmsr(SYSCFG_MSR); - mtrr_aseg_orig = rdmsr(MTRR_FIX_16K_A0000); - - /* MTRR changes don't like an enabled cache */ - disable_cache(); - - msr = syscfg_orig; - - /* Allow changes to MTRR extended attributes */ - msr.lo |= SYSCFG_MSR_MtrrFixDramModEn; - /* turn the extended attributes off until we fix - * them so A0000 is routed to memory - */ - msr.lo &= ~SYSCFG_MSR_MtrrFixDramEn; - wrmsr(SYSCFG_MSR, msr); - - /* set DRAM access to 0xa0000 */ - msr.lo = 0x18181818; - msr.hi = 0x18181818; - wrmsr(MTRR_FIX_16K_A0000, msr); - - /* enable the extended features */ - msr = syscfg_orig; - msr.lo |= SYSCFG_MSR_MtrrFixDramModEn; - msr.lo |= SYSCFG_MSR_MtrrFixDramEn; - wrmsr(SYSCFG_MSR, msr); - - enable_cache(); - /* copy the real SMM handler */ - memcpy((void *)SMM_BASE, _binary_smm_start, _binary_smm_end - _binary_smm_start); - wbinvd(); - disable_cache(); - - /* Restore SYSCFG and MTRR */ - wrmsr(SYSCFG_MSR, syscfg_orig); - wrmsr(MTRR_FIX_16K_A0000, mtrr_aseg_orig); - enable_cache(); - - /* CPU MSR are set in CPU init */ -} - -void smm_init_completion(void) -{ -}