Patch merged into coreboot/master: intel/fsp_baytrail: Fix I2C abort logic

the following patch was just integrated into master:
commit 77e351d9d17cf8e8ad1c70200192ac59285b3096
Author: Ben Gardner <[e-mail]>
Date:   Wed Mar 23 09:40:37 2016 -0500

    intel/fsp_baytrail: Fix I2C abort logic
    
    A call to i2c_read() for a non-existent address followed by an i2c_read()
    to a valid address results in a false abort status for the 2nd call.
    
    i2c_read(1, 0x40, 0, buf, sizeof(buf)) => 0x2000000 (I2C_ERR_TIMEOUT)
    i2c_read(1, 0x74, 0, buf, sizeof(buf)) => 0x4000000 (I2C_ERR_ABORT)
    
    Because the abort status register is cleared on read and wait_tx_fifo()
    reads it twice, the returned status does not contain the abort status.
    Fixing that changed the 2nd read to reflect the abort status.
    
    i2c_read(1, 0x40, 0, buf, sizeof(buf)) => 0x2000000 (I2C_ERR_TIMEOUT)
    i2c_read(1, 0x74, 0, buf, sizeof(buf)) => 0x4000001 (I2C_ERR_ABORT)
    
    Bit 0 indicates that the address was not acknowledged by any slave.
    That's the abort status from the previous transaction.
    So I added a read of the abort status before starting a transaction in
    both i2c_read() and i2c_write().
    
    i2c_read(1, 0x40, 0, buf, sizeof(buf)) => 0x2000000 (I2C_ERR_TIMEOUT)
    i2c_read(1, 0x74, 0, buf, sizeof(buf)) => 0 (I2C_SUCCESS)
    
    Tested on a Bay Trail E3845 SoC.
    
    Change-Id: I39e4ff4206587267b6fceef58f4a567bf162fbbe
    Signed-off-by: Ben Gardner <[e-mail]>
    Reviewed-on: https://review.coreboot.org/14160
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <[e-mail]>
    Reviewed-by: Werner Zeh <[e-mail]>


See https://review.coreboot.org/14160 for details.

-gerrit