Change in coreboot[master]: soc/intel/broadwell: Move SATA DevSlp setup to a function

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47028 )

Change subject: soc/intel/broadwell: Move SATA DevSlp setup to a function
......................................................................

soc/intel/broadwell: Move SATA DevSlp setup to a function

This is just to ease merging with Lynxpoint later on.

Change-Id: I943828bd1ec191cdf568b7efca28c3da5f227d7c
Signed-off-by: Angel Pons 
---
M src/soc/intel/broadwell/pch/sata.c
1 file changed, 34 insertions(+), 27 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/47028/1

diff --git a/src/soc/intel/broadwell/pch/sata.c b/src/soc/intel/broadwell/pch/sata.c
index e157252..91c2ff5 100644
--- a/src/soc/intel/broadwell/pch/sata.c
+++ b/src/soc/intel/broadwell/pch/sata.c
@@ -36,6 +36,39 @@
    pci_write_config32(dev, SATA_SIRD, value | set);
 }

+static void sata_configure_devslp(
+	const struct soc_intel_broadwell_pch_config *config,
+	const uintptr_t abar)
+{
+	union abar_reg_cap_2 abar_cap_2 = {
+		.raw = abar_read32(abar, ABAR_REG_CAP_2),
+	};
+
+	if (config->sata_devslp_disable) {
+		abar_cap_2.supports_device_sleep = 0;
+		abar_write32(abar, ABAR_REG_CAP_2, abar_cap_2.raw);
+		return;
+	}
+
+	abar_cap_2.auto_partial_to_slumber   = 1;
+	abar_cap_2.supports_device_sleep     = 1;
+	abar_cap_2.aggressive_devslp_mgmt    = 1;
+	abar_cap_2.devslp_entry_slumber_only = 1;
+
+	abar_write32(abar, ABAR_REG_CAP_2, abar_cap_2.raw);
+
+	for (int port = 0; port < 4; port++) {
+		if (!(config->sata_port_map & (1 << port)))
+			continue;
+
+		union abar_reg_px_devslp px_devslp = {
+			.raw = abar_read32(abar, ABAR_REG_PxDEVSLP(port)),
+		};
+		px_devslp.device_sleep_present = 1;
+		abar_write32(abar, ABAR_REG_PxDEVSLP(port), px_devslp.raw);
+	}
+}
+
 static void sata_init(struct device *dev)
 {
    const struct soc_intel_broadwell_pch_config *config = config_of(dev);
@@ -96,33 +129,7 @@

abar_write_ports_implemented(abar, config->sata_port_map);

-	union abar_reg_cap_2 abar_cap_2 = {
-		.raw = abar_read32(abar, ABAR_REG_CAP_2),
-	};
-
-	if (config->sata_devslp_disable) {
-		abar_cap_2.supports_device_sleep = 0;
-
-		abar_write32(abar, ABAR_REG_CAP_2, abar_cap_2.raw);
-	} else {
-		abar_cap_2.auto_partial_to_slumber   = 1;
-		abar_cap_2.supports_device_sleep     = 1;
-		abar_cap_2.aggressive_devslp_mgmt    = 1;
-		abar_cap_2.devslp_entry_slumber_only = 1;
-
-		abar_write32(abar, ABAR_REG_CAP_2, abar_cap_2.raw);
-
-		for (int port = 0; port < 4; port++) {
-			if (!(config->sata_port_map & (1 << port)))
-				continue;
-
-			union abar_reg_px_devslp px_devslp = {
-				.raw = abar_read32(abar, ABAR_REG_PxDEVSLP(port)),
-			};
-			px_devslp.device_sleep_present = 1;
-			abar_write32(abar, ABAR_REG_PxDEVSLP(port), px_devslp.raw);
-		}
-	}
+	sata_configure_devslp(config, abar);

/*
     * Static Power Gating for unused ports

[Angel Pons (Code Review)]

Hello Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47028

to look at the new patch set (#2).

Change subject: soc/intel/broadwell: Move SATA DevSlp setup to a function
......................................................................

soc/intel/broadwell: Move SATA DevSlp setup to a function

This is just to ease merging with Lynxpoint later on.

Change-Id: I943828bd1ec191cdf568b7efca28c3da5f227d7c
Signed-off-by: Angel Pons 
---
M src/soc/intel/broadwell/pch/sata.c
1 file changed, 34 insertions(+), 27 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/47028/2

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47028 )

Change subject: soc/intel/broadwell: Move SATA DevSlp setup to a function
......................................................................

Patch Set 2: Code-Review+2