Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76187?usp=email )
Change subject: mb/google/nissa/var/joxer: Disable external fivr ......................................................................
mb/google/nissa/var/joxer: Disable external fivr
In next phase, joxer will remove external fivr.
BUG=b:285477026 TEST=emerge-nissa coreboot and boot to OS, suspend/resume work normally.
Signed-off-by: Mark Hsieh mark_hsieh@wistron.corp-partner.google.com Change-Id: I7fd7ad90e1544966170df402243604379f5790db Reviewed-on: https://review.coreboot.org/c/coreboot/+/76187 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Eric Lai eric_lai@quanta.corp-partner.google.com Reviewed-by: Derek Huang derekhuang@google.com --- M src/mainboard/google/brya/variants/joxer/overridetree.cb 1 file changed, 0 insertions(+), 10 deletions(-)
Approvals: Eric Lai: Looks good to me, approved Derek Huang: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/mainboard/google/brya/variants/joxer/overridetree.cb b/src/mainboard/google/brya/variants/joxer/overridetree.cb index 8ec3b21..bab93f6 100644 --- a/src/mainboard/google/brya/variants/joxer/overridetree.cb +++ b/src/mainboard/google/brya/variants/joxer/overridetree.cb @@ -22,16 +22,6 @@ # Configure external V1P05/Vnn/VnnSx Rails register "ext_fivr_settings" = "{ .configure_ext_fivr = 1, - .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, - .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, - .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, - .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, - .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE, - .v1p05_voltage_mv = 1050, - .vnn_voltage_mv = 780, - .vnn_sx_voltage_mv = 1050, - .v1p05_icc_max_ma = 500, - .vnn_icc_max_ma = 500, }"
# Intel Common SoC Config