Change in coreboot[master]: arch/x86/Makefile: Align VGA_BIOS to 64 bytes when using AMD LPC SPI DMA

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56579 )

Change subject: arch/x86/Makefile: Align VGA_BIOS to 64 bytes when using AMD LPC SPI DMA
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arch/x86/Makefile: Align VGA_BIOS to 64 bytes when using AMD LPC SPI DMA

AMD platforms require the SPI contents to be 64 byte aligned in order to
use the SPI DMA controller.

BUG=b:179699789
TEST=Build guybrush and verify cbfs was invoked with -a 64

Signed-off-by: Raul E Rangel 
Change-Id: I842c85288acd8f7ac99b127c94b1cf235e264ea2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56579
Tested-by: build bot (Jenkins) 
Reviewed-by: Julius Werner 
---
M src/arch/x86/Makefile.inc
1 file changed, 7 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Julius Werner: Looks good to me, approved

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index e91ddac..458bcc6 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -43,6 +43,13 @@
 pci$(stripped_vgabios_dgpu_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_DGPU_FILE))
 pci$(stripped_vgabios_dgpu_id).rom-type := optionrom

+# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
+ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
+pci$(stripped_vgabios_id).rom-align := 64
+pci$(stripped_second_vbios_id).rom-align := 64
+pci$(stripped_vgabios_dgpu_id).rom-align := 64
+endif # CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
+
 ###############################################################################
 # common support for early assembly includes
 ###############################################################################

10 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.