[M] Change in coreboot[master]: soc: Use a more qualified path for "../../chip.h"

[Elyes Haouas (Code Review)]

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69061 )

Change subject: soc: Use a more qualified path for "../../chip.h"
......................................................................

soc: Use a more qualified path for "../../chip.h"

Change-Id: I3e73e3599e65b82b70c33947683198778c1b3491
Signed-off-by: Elyes Haouas 
---
M src/soc/intel/alderlake/include/soc/soc_chip.h
M src/soc/intel/apollolake/include/soc/soc_chip.h
M src/soc/intel/baytrail/romstage/pmc.c
M src/soc/intel/braswell/include/soc/ramstage.h
M src/soc/intel/braswell/romstage/romstage.c
M src/soc/intel/cannonlake/include/soc/ramstage.h
M src/soc/intel/cannonlake/include/soc/soc_chip.h
M src/soc/intel/cannonlake/romstage/fsp_params.c
M src/soc/intel/cannonlake/romstage/romstage.c
M src/soc/intel/denverton_ns/include/soc/soc_chip.h
M src/soc/intel/elkhartlake/include/soc/soc_chip.h
M src/soc/intel/icelake/include/soc/soc_chip.h
M src/soc/intel/jasperlake/include/soc/soc_chip.h
M src/soc/intel/meteorlake/include/soc/soc_chip.h
M src/soc/intel/quark/include/soc/ramstage.h
M src/soc/intel/quark/romstage/fsp_params.c
M src/soc/intel/skylake/bootblock/pch.c
M src/soc/intel/skylake/include/soc/ramstage.h
M src/soc/intel/skylake/include/soc/soc_chip.h
M src/soc/intel/tigerlake/include/soc/soc_chip.h
M src/soc/intel/xeon_sp/include/soc/soc_chip.h
M src/soc/mediatek/mt8195/include/soc/soc_chip.h
M src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
23 files changed, 48 insertions(+), 44 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/69061/1

diff --git a/src/soc/intel/alderlake/include/soc/soc_chip.h b/src/soc/intel/alderlake/include/soc/soc_chip.h
index 584eda2..3bddc6b 100644
--- a/src/soc/intel/alderlake/include/soc/soc_chip.h
+++ b/src/soc/intel/alderlake/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_ALDERLAKE_SOC_CHIP_H_
 #define _SOC_ALDERLAKE_SOC_CHIP_H_

-#include "../../chip.h"
+#include <soc/intel/alderlake/chip.h>

#endif /* _SOC_ALDERLAKE_SOC_CHIP_H_ */
diff --git a/src/soc/intel/apollolake/include/soc/soc_chip.h b/src/soc/intel/apollolake/include/soc/soc_chip.h
index a60d78a..2f1f452 100644
--- a/src/soc/intel/apollolake/include/soc/soc_chip.h
+++ b/src/soc/intel/apollolake/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_APOLLOLAKE_SOC_CHIP_H_
 #define _SOC_APOLLOLAKE_SOC_CHIP_H_

-#include "../../chip.h"
+#include <soc/intel/apollolake/chip.h>

#endif /* _SOC_APOLLOLAKE_SOC_CHIP_H_ */
diff --git a/src/soc/intel/baytrail/romstage/pmc.c b/src/soc/intel/baytrail/romstage/pmc.c
index be058d0..a40aeb0 100644
--- a/src/soc/intel/baytrail/romstage/pmc.c
+++ b/src/soc/intel/baytrail/romstage/pmc.c
@@ -1,17 +1,17 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <stdint.h>
-#include <device/pci_ops.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci_def.h>
+#include <device/pci_ops.h>
+#include <soc/intel/baytrail/chip.h>
 #include <soc/iomap.h>
 #include <soc/iosf.h>
 #include <soc/lpc.h>
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/romstage.h>
-#include "../chip.h"
+#include <stdint.h>

/* This sequence signals the PUNIT to start running. */
 void punit_init(void)
diff --git a/src/soc/intel/braswell/include/soc/ramstage.h b/src/soc/intel/braswell/include/soc/ramstage.h
index a1a2ea5..6d80873 100644
--- a/src/soc/intel/braswell/include/soc/ramstage.h
+++ b/src/soc/intel/braswell/include/soc/ramstage.h
@@ -5,8 +5,7 @@

#include <device/device.h>
 #include <fsp/ramstage.h>
-
-#include "../../chip.h"
+#include <soc/intel/braswell/chip.h>

#define V_PCH_LPC_RID_A0		0x00  // A0 Stepping
 #define V_PCH_LPC_RID_A1		0x04  // A1 Stepping
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c
index a1623e1..a850779 100644
--- a/src/soc/intel/braswell/romstage/romstage.c
+++ b/src/soc/intel/braswell/romstage/romstage.c
@@ -1,16 +1,15 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <cbmem.h>
-#include <stdint.h>
-#include <commonlib/helpers.h>
 #include <arch/io.h>
-#include <device/mmio.h>
+#include <cbmem.h>
+#include <commonlib/helpers.h>
 #include <console/console.h>
+#include <device/mmio.h>
+#include <soc/intel/braswell/chip.h>
 #include <soc/iomap.h>
 #include <soc/iosf.h>
 #include <soc/romstage.h>
-
-#include "../chip.h"
+#include <stdint.h>

static struct chipset_power_state power_state;

diff --git a/src/soc/intel/cannonlake/include/soc/ramstage.h b/src/soc/intel/cannonlake/include/soc/ramstage.h
index ff4fd59..cf537aa 100644
--- a/src/soc/intel/cannonlake/include/soc/ramstage.h
+++ b/src/soc/intel/cannonlake/include/soc/ramstage.h
@@ -6,8 +6,7 @@
 #include <device/device.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
-
-#include "../../chip.h"
+#include <soc/intel/cannonlake/chip.h>

void mainboard_silicon_init_params(FSPS_UPD *supd);
 void soc_init_pre_device(void *chip_info);
diff --git a/src/soc/intel/cannonlake/include/soc/soc_chip.h b/src/soc/intel/cannonlake/include/soc/soc_chip.h
index bc99cc0..ada1aae 100644
--- a/src/soc/intel/cannonlake/include/soc/soc_chip.h
+++ b/src/soc/intel/cannonlake/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_CANNONLAKE_SOC_CHIP_H_
 #define _SOC_CANNONLAKE_SOC_CHIP_H_

-#include "../../chip.h"
+#include <soc/intel/cannonlake/chip.h>

#endif /* _SOC_CANNONLAKE_SOC_CHIP_H_ */
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c
index 842c8fb..41f00f3 100644
--- a/src/soc/intel/cannonlake/romstage/fsp_params.c
+++ b/src/soc/intel/cannonlake/romstage/fsp_params.c
@@ -1,22 +1,21 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <assert.h>
+#include <console/console.h>
+#include <cpu/x86/msr.h>
 #include <device/pci_def.h>
 #include <device/pci.h>
-#include <cpu/x86/msr.h>
-#include <console/console.h>
 #include <fsp/util.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/pmclib.h>
 #include <option.h>
+#include <soc/intel/cannonlake/chip.h>
 #include <soc/iomap.h>
 #include <soc/msr.h>
 #include <soc/pci_devs.h>
 #include <soc/romstage.h>
 #include <types.h>

-#include "../chip.h"
-
 void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 {
    const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC);
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 1ea91da..4d13f2e 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -9,6 +9,7 @@
 #include <intelblocks/pmclib.h>
 #include <intelblocks/smbus.h>
 #include <memory_info.h>
+#include <soc/intel/cannonlake/chip.h>
 #include <soc/intel/common/smbios.h>
 #include <soc/iomap.h>
 #include <soc/pci_devs.h>
@@ -16,8 +17,6 @@
 #include <soc/romstage.h>
 #include <string.h>

-#include "../chip.h"
-
 #define FSP_SMBIOS_MEMORY_INFO_GUID	\
 {	\
    0xd4, 0x71, 0x20, 0x9b, 0x54, 0xb0, 0x0c, 0x4e,	\
diff --git a/src/soc/intel/denverton_ns/include/soc/soc_chip.h b/src/soc/intel/denverton_ns/include/soc/soc_chip.h
index 800e78e..3cfd35d 100644
--- a/src/soc/intel/denverton_ns/include/soc/soc_chip.h
+++ b/src/soc/intel/denverton_ns/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_DENVERTON_NS_SOC_CHIP_H_
 #define _SOC_DENVERTON_NS_SOC_CHIP_H_

-#include "../../chip.h"
+#include <soc/intel/denverton_ns/chip.h>

#endif /* _SOC_DENVERTON_NS_SOC_CHIP_H_ */
diff --git a/src/soc/intel/elkhartlake/include/soc/soc_chip.h b/src/soc/intel/elkhartlake/include/soc/soc_chip.h
index 6fccc64..a75de46 100644
--- a/src/soc/intel/elkhartlake/include/soc/soc_chip.h
+++ b/src/soc/intel/elkhartlake/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_ELKHARTLAKE_SOC_CHIP_H_
 #define _SOC_ELKHARTLAKE_SOC_CHIP_H_

-#include "../../chip.h"
+#include <soc/intel/elkhartlake/chip.h>

#endif /* _SOC_ELKHARTLAKE_SOC_CHIP_H_ */
diff --git a/src/soc/intel/icelake/include/soc/soc_chip.h b/src/soc/intel/icelake/include/soc/soc_chip.h
index 0a58db3..cda7a45 100644
--- a/src/soc/intel/icelake/include/soc/soc_chip.h
+++ b/src/soc/intel/icelake/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_ICELAKE_SOC_CHIP_H_
 #define _SOC_ICELAKE_SOC_CHIP_H_

-#include "../../chip.h"
+#include <soc/intel/icelake/chip.h>

#endif /* _SOC_ICELAKE_SOC_CHIP_H_ */
diff --git a/src/soc/intel/jasperlake/include/soc/soc_chip.h b/src/soc/intel/jasperlake/include/soc/soc_chip.h
index 4b90ed4..5c1be80 100644
--- a/src/soc/intel/jasperlake/include/soc/soc_chip.h
+++ b/src/soc/intel/jasperlake/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_JASPERLAKE_SOC_CHIP_H_
 #define _SOC_JASPERLAKE_SOC_CHIP_H_

-#include "../../chip.h"
+#include <soc/intel/jasperlake/chip.h>

#endif /* _SOC_JASPERLAKE_SOC_CHIP_H_ */
diff --git a/src/soc/intel/meteorlake/include/soc/soc_chip.h b/src/soc/intel/meteorlake/include/soc/soc_chip.h
index c72c0e9..f065fcc 100644
--- a/src/soc/intel/meteorlake/include/soc/soc_chip.h
+++ b/src/soc/intel/meteorlake/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_METEORLAKE_SOC_CHIP_H_
 #define _SOC_METEORLAKE_SOC_CHIP_H_

-#include "../../chip.h"
+#include <soc/intel/meteorlake/chip.h>

#endif /* _SOC_METEORLAKE_SOC_CHIP_H_ */
diff --git a/src/soc/intel/quark/include/soc/ramstage.h b/src/soc/intel/quark/include/soc/ramstage.h
index d54a74a..6e191d2 100644
--- a/src/soc/intel/quark/include/soc/ramstage.h
+++ b/src/soc/intel/quark/include/soc/ramstage.h
@@ -5,10 +5,9 @@

#include <arch/cpu.h>
 #include <device/device.h>
+#include <soc/intel/quark/chip.h>
 #include <soc/QuarkNcSocId.h>

-#include "../../chip.h"
-
 void mainboard_gpio_i2c_init(struct device *dev);
 asmlinkage void chipset_teardown_car(void);

diff --git a/src/soc/intel/quark/romstage/fsp_params.c b/src/soc/intel/quark/romstage/fsp_params.c
index 11f7059..89585fe 100644
--- a/src/soc/intel/quark/romstage/fsp_params.c
+++ b/src/soc/intel/quark/romstage/fsp_params.c
@@ -2,15 +2,15 @@

#include <arch/romstage.h>
 #include <arch/symbols.h>
-#include <console/console.h>
 #include <cbmem.h>
-#include "../chip.h"
+#include <console/console.h>
 #include <fsp/util.h>
+#include <soc/intel/quark/chip.h>
 #include <soc/iomap.h>
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
-#include <soc/romstage.h>
 #include <soc/reg_access.h>
+#include <soc/romstage.h>
 #include <soc/storage_test.h>

void mainboard_romstage_entry(void)
diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
index cc2d384..d12ae81 100644
--- a/src/soc/intel/skylake/bootblock/pch.c
+++ b/src/soc/intel/skylake/bootblock/pch.c
@@ -1,7 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-#include <device/pci_ops.h>
+
 #include <device/device.h>
 #include <device/pci_def.h>
+#include <device/pci_ops.h>
 #include <intelblocks/fast_spi.h>
 #include <intelblocks/gspi.h>
 #include <intelblocks/itss.h>
@@ -11,6 +12,7 @@
 #include <intelblocks/pmclib.h>
 #include <intelblocks/rtc.h>
 #include <soc/bootblock.h>
+#include <soc/intel/skylake/chip.h>
 #include <soc/iomap.h>
 #include <soc/p2sb.h>
 #include <soc/pch.h>
@@ -18,7 +20,6 @@
 #include <soc/pcr_ids.h>
 #include <soc/pm.h>
 #include <soc/pmc.h>
-#include "../chip.h"

#define PCR_DMI_ACPIBA		0x27B4
 #define PCR_DMI_ACPIBDID	0x27B8
diff --git a/src/soc/intel/skylake/include/soc/ramstage.h b/src/soc/intel/skylake/include/soc/ramstage.h
index a5e6930..744e213 100644
--- a/src/soc/intel/skylake/include/soc/ramstage.h
+++ b/src/soc/intel/skylake/include/soc/ramstage.h
@@ -6,8 +6,7 @@
 #include <device/device.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
-
-#include "../../chip.h"
+#include <soc/intel/skylake/chip.h>

#define FSP_SIL_UPD FSP_S_CONFIG
 #define FSP_MEM_UPD FSP_M_CONFIG
diff --git a/src/soc/intel/skylake/include/soc/soc_chip.h b/src/soc/intel/skylake/include/soc/soc_chip.h
index b47918c..1c82171 100644
--- a/src/soc/intel/skylake/include/soc/soc_chip.h
+++ b/src/soc/intel/skylake/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_SKYLAKE_SOC_CHIP_H_
 #define _SOC_SKYLAKE_SOC_CHIP_H_

-#include "../../chip.h"
+#include <soc/intel/skylake/chip.h>

#endif /* _SOC_SKYLAKE_SOC_CHIP_H_ */
diff --git a/src/soc/intel/tigerlake/include/soc/soc_chip.h b/src/soc/intel/tigerlake/include/soc/soc_chip.h
index 7419687..61687b6 100644
--- a/src/soc/intel/tigerlake/include/soc/soc_chip.h
+++ b/src/soc/intel/tigerlake/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_TIGERLAKE_SOC_CHIP_H_
 #define _SOC_TIGERLAKE_SOC_CHIP_H_

-#include "../../chip.h"
+#include <soc/intel/tigerlake/chip.h>

#endif /* _SOC_TIGERLAKE_SOC_CHIP_H_ */
diff --git a/src/soc/intel/xeon_sp/include/soc/soc_chip.h b/src/soc/intel/xeon_sp/include/soc/soc_chip.h
index 3113ead..8f45b03 100644
--- a/src/soc/intel/xeon_sp/include/soc/soc_chip.h
+++ b/src/soc/intel/xeon_sp/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef _SOC_XEON_SP_SOC_CHIP_H_
 #define _SOC_XEON_SP_SOC_CHIP_H_

-#include "../chip.h"
+#include <soc/intel/xeon_sp/chip.h>

#endif /* _SOC_XEON_SP_SOC_CHIP_H_ */
diff --git a/src/soc/mediatek/mt8195/include/soc/soc_chip.h b/src/soc/mediatek/mt8195/include/soc/soc_chip.h
index 6b3c354..90b60ab 100644
--- a/src/soc/mediatek/mt8195/include/soc/soc_chip.h
+++ b/src/soc/mediatek/mt8195/include/soc/soc_chip.h
@@ -3,6 +3,6 @@
 #ifndef SOC_MEDIATEK_SOC_CHIP_H
 #define SOC_MEDIATEK_SOC_CHIP_H

-#include "../../chip.h"
+#include <soc/mediatek/mt8195/chip.h>

#endif /* SOC_MEDIATEK_SOC_CHIP_H */
diff --git a/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c b/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
index 6968502..f936046 100644
--- a/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
+++ b/src/soc/nvidia/tegra210/jdi_25x18_display/panel-jdi-lpm102a188a.c
@@ -1,17 +1,17 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <console/console.h>
-#include <stdint.h>
 #include <delay.h>
+#include <device/device.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
-#include <device/device.h>
-#include <soc/nvidia/tegra/types.h>
 #include <soc/display.h>
 #include <soc/mipi_dsi.h>
+#include <soc/nvidia/tegra/types.h>
+#include <soc/nvidia/tegra210/chip.h>
 #include <soc/tegra_dsi.h>
+#include <stdint.h>

-#include "../chip.h"
 #include "panel-jdi-lpm102a188a.h"

struct panel_jdi jdi_data[NUM_DSI];