Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46907 )
Change subject: mb/intel/baskingridge: Replace invalid C-state values ......................................................................
mb/intel/baskingridge: Replace invalid C-state values
Basking Ridge is not ULT, thus does not support C-states deeper than C7. Replace them with the values used by all other Haswell non-ULT boards to allow subsequent commits to cleanly factor them out of the devicetree.
Change-Id: Ife34f7828f9ef19c8fccb3ac7b60146960112a81 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/intel/baskingridge/devicetree.cb 1 file changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/46907/1
diff --git a/src/mainboard/intel/baskingridge/devicetree.cb b/src/mainboard/intel/baskingridge/devicetree.cb index 6345090..ad3d35a 100644 --- a/src/mainboard/intel/baskingridge/devicetree.cb +++ b/src/mainboard/intel/baskingridge/devicetree.cb @@ -17,13 +17,13 @@ # Magic APIC ID to locate this chip device lapic 0xACAC off end
- register "c1_battery" = "2" # ACPI(C1) = MWAIT(C1E) - register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3) - register "c3_battery" = "9" # ACPI(C3) = MWAIT(C7S) + register "c1_battery" = "1" + register "c2_battery" = "3" + register "c3_battery" = "5"
- register "c1_acpower" = "2" # ACPI(C1) = MWAIT(C1E) - register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) - register "c3_acpower" = "9" # ACPI(C3) = MWAIT(C7S) + register "c1_acpower" = "1" + register "c2_acpower" = "3" + register "c3_acpower" = "5" end end
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46907
to look at the new patch set (#5).
Change subject: mb/intel/baskingridge: Replace invalid C-state values ......................................................................
mb/intel/baskingridge: Replace invalid C-state values
Basking Ridge is not ULT, thus does not support C-states deeper than C7. Replace them with the values used by all other Haswell non-ULT boards to allow subsequent commits to cleanly factor them out of the devicetree.
Change-Id: Ife34f7828f9ef19c8fccb3ac7b60146960112a81 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/intel/baskingridge/devicetree.cb 1 file changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/46907/5
Attention is currently required from: Nico Huber, Angel Pons, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46907 )
Change subject: mb/intel/baskingridge: Replace invalid C-state values ......................................................................
Patch Set 15: Code-Review+2
(1 comment)
Patchset:
PS15: Did you ever test ACPI C-states (on linux) with haswell?
Attention is currently required from: Nico Huber, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46907 )
Change subject: mb/intel/baskingridge: Replace invalid C-state values ......................................................................
Patch Set 15:
(1 comment)
Patchset:
PS15:
Did you ever test ACPI C-states (on linux) with haswell?
I wouldn't know how to test them. In any case, having all boards use the same ACPI C-state values will help w.r.t. maintenance and fixes.
Attention is currently required from: Nico Huber, Angel Pons, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46907 )
Change subject: mb/intel/baskingridge: Replace invalid C-state values ......................................................................
Patch Set 15:
(1 comment)
Patchset:
PS15:
I wouldn't know how to test them. In any case, having all boards use the same ACPI C-state values will help w.r.t. maintenance and fixes.
If you're interested in testing: booting with "intel_idle.max_cstates=0" kernel argument will use acpi_idle instead of intel_idle.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46907 )
Change subject: mb/intel/baskingridge: Replace invalid C-state values ......................................................................
mb/intel/baskingridge: Replace invalid C-state values
Basking Ridge is not ULT, thus does not support C-states deeper than C7. Replace them with the values used by all other Haswell non-ULT boards to allow subsequent commits to cleanly factor them out of the devicetree.
Change-Id: Ife34f7828f9ef19c8fccb3ac7b60146960112a81 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46907 Reviewed-by: Arthur Heymans arthur@aheymans.xyz Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/intel/baskingridge/devicetree.cb 1 file changed, 6 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved
diff --git a/src/mainboard/intel/baskingridge/devicetree.cb b/src/mainboard/intel/baskingridge/devicetree.cb index 784c926..797230c 100644 --- a/src/mainboard/intel/baskingridge/devicetree.cb +++ b/src/mainboard/intel/baskingridge/devicetree.cb @@ -17,13 +17,13 @@ # Magic APIC ID to locate this chip device lapic 0xACAC off end
- register "c1_battery" = "2" # ACPI(C1) = MWAIT(C1E) - register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3) - register "c3_battery" = "9" # ACPI(C3) = MWAIT(C7S) + register "c1_battery" = "1" + register "c2_battery" = "3" + register "c3_battery" = "5"
- register "c1_acpower" = "2" # ACPI(C1) = MWAIT(C1E) - register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) - register "c3_acpower" = "9" # ACPI(C3) = MWAIT(C7S) + register "c1_acpower" = "1" + register "c2_acpower" = "3" + register "c3_acpower" = "5" end end
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review)
-
Patrick Georgi (Code Review)