Attention is currently required from: Arthur Heymans, Felix Held.
Hello Arthur Heymans, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/75102
to look at the new patch set (#2).
Change subject: device/pci: Limit default domain memory window ......................................................................
device/pci: Limit default domain memory window
When the default pci_domain_read_resources() is used, keep 32-bit memory resources below the limit given by CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT. This serves as a workaround for missing/wrong reservations of chipset resources.
This will help to get more stable results from our own allocator, but is far from a complete solution. Indvi- dual platform ASL code also needs to be considered, so the OS won't assign conflicting resources.
Tested on QEMU/Q35 and Siemens/Chili w/ and w/o top- down allocation. Fixes EHCI w/ top-down in QEMU.
Change-Id: Iae0d888eebd0ec11a9d6f12975ae24dc32a80d8c Signed-off-by: Nico Huber nico.huber@secunet.com --- M src/device/Kconfig M src/device/pci_device.c M src/soc/intel/common/block/systemagent/Kconfig 3 files changed, 52 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/75102/2