HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43368 )
Change subject: src/include: Add missing includes ......................................................................
src/include: Add missing includes
Change-Id: I746ea7805bae553a146130994d8174aa2e189610 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/include/acpi/acpi_ivrs.h M src/include/acpi/acpigen_dptf.h M src/include/assert.h M src/include/boot/coreboot_tables.h M src/include/cbfs.h M src/include/cpu/amd/mtrr.h M src/include/cpu/cpu.h M src/include/cpu/intel/l2_cache.h M src/include/cpu/x86/bist.h M src/include/cpu/x86/mp.h M src/include/cpu/x86/smi_deprecated.h M src/include/device/i2c_simple.h M src/include/device/pci_ehci.h M src/include/device/pci_rom.h M src/include/device/pcix.h M src/include/elog.h M src/include/fmap.h M src/include/pc80/i8259.h M src/include/spd_cache.h M src/include/superio/hwm5_conf.h M src/include/timestamp.h 21 files changed, 34 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/43368/1
diff --git a/src/include/acpi/acpi_ivrs.h b/src/include/acpi/acpi_ivrs.h index 82748d0..de3bdea 100644 --- a/src/include/acpi/acpi_ivrs.h +++ b/src/include/acpi/acpi_ivrs.h @@ -11,6 +11,8 @@ #ifndef __ACPI_ACPI_IVRS_H__ #define __ACPI_ACPI_IVRS_H__
+#include <stdint.h> + /* I/O Virtualization Reporting Structure (IVRS) */ #define IVHD_BLOCK_TYPE_LEGACY__FIXED 0x10 #define IVHD_BLOCK_TYPE_FULL__FIXED 0x11 diff --git a/src/include/acpi/acpigen_dptf.h b/src/include/acpi/acpigen_dptf.h index 89b64f3..e8657a9 100644 --- a/src/include/acpi/acpigen_dptf.h +++ b/src/include/acpi/acpigen_dptf.h @@ -5,6 +5,7 @@
#include <device/device.h> #include <stdbool.h> +#include <stdint.h>
/* A common idiom is to use a default value if none is provided (i.e., == 0) */ #define DEFAULT_IF_0(thing, default_) ((thing) ? (thing) : (default_)) diff --git a/src/include/assert.h b/src/include/assert.h index f656d81..fb12053 100644 --- a/src/include/assert.h +++ b/src/include/assert.h @@ -5,6 +5,7 @@
#include <arch/hlt.h> #include <console/console.h> +#include <stdint.h>
/* TODO: Fix vendorcode headers to not define macros coreboot uses or to be more properly isolated. */ diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index 5bebd4a..7fd9ac1 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -3,6 +3,8 @@
#include <commonlib/coreboot_tables.h> #include <stddef.h> +#include <stdint.h> + /* function prototypes for building the coreboot table */
/* diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 29621c6..a35597d 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -5,6 +5,8 @@
#include <commonlib/cbfs.h> #include <program_loading.h> +#include <stddef.h> +#include <stdint.h>
/*********************************************** * Perform CBFS operations on the boot device. * diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index 906a7c0..608a9df 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -41,6 +41,7 @@ #if !defined(__ASSEMBLER__)
#include <cpu/x86/msr.h> +#include <stdint.h>
void amd_setup_mtrrs(void); struct device; diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h index db324b6da..99249ba 100644 --- a/src/include/cpu/cpu.h +++ b/src/include/cpu/cpu.h @@ -2,6 +2,7 @@ #define CPU_CPU_H
#include <arch/cpu.h> +#include <stdint.h>
void cpu_initialize(unsigned int cpu_index); /* Returns default APIC id based on logical_cpu number or < 0 on failure. */ diff --git a/src/include/cpu/intel/l2_cache.h b/src/include/cpu/intel/l2_cache.h index 1c33c24..ceddf1d 100644 --- a/src/include/cpu/intel/l2_cache.h +++ b/src/include/cpu/intel/l2_cache.h @@ -13,6 +13,8 @@ #ifndef __P6_L2_CACHE_H #define __P6_L2_CACHE_H
+#include <stdint.h> + #define EBL_CR_POWERON 0x2A
#define BBL_CR_D0 0x88 diff --git a/src/include/cpu/x86/bist.h b/src/include/cpu/x86/bist.h index 9535e69..eb34c97 100644 --- a/src/include/cpu/x86/bist.h +++ b/src/include/cpu/x86/bist.h @@ -2,6 +2,7 @@ #define CPU_X86_BIST_H
#include <console/console.h> +#include <stdint.h>
static inline void report_bist_failure(u32 bist) { diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h index 04f7804..b2704eb 100644 --- a/src/include/cpu/x86/mp.h +++ b/src/include/cpu/x86/mp.h @@ -5,6 +5,8 @@
#include <arch/smp/atomic.h> #include <cpu/x86/smm.h> +#include <stddef.h> +#include <stdint.h>
#define CACHELINE_SIZE 64
diff --git a/src/include/cpu/x86/smi_deprecated.h b/src/include/cpu/x86/smi_deprecated.h index d7f3c7f..c20f21b 100644 --- a/src/include/cpu/x86/smi_deprecated.h +++ b/src/include/cpu/x86/smi_deprecated.h @@ -3,6 +3,8 @@ #ifndef __X86_SMI_DEPRECATED_H__ #define __X86_SMI_DEPRECATED_H__
+#include <stdint.h> + #if CONFIG(PARALLEL_MP) || !CONFIG(HAVE_SMI_HANDLER) /* Empty stubs for platforms without SMI handlers. */ static inline void smm_init(void) { } diff --git a/src/include/device/i2c_simple.h b/src/include/device/i2c_simple.h index 03d6828..de1c0eb 100644 --- a/src/include/device/i2c_simple.h +++ b/src/include/device/i2c_simple.h @@ -5,6 +5,7 @@
#include <commonlib/helpers.h> #include <device/i2c.h> +#include <stdint.h>
int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments, int count); diff --git a/src/include/device/pci_ehci.h b/src/include/device/pci_ehci.h index c3bcdc9..e7a445d 100644 --- a/src/include/device/pci_ehci.h +++ b/src/include/device/pci_ehci.h @@ -5,6 +5,7 @@
#include <device/device.h> #include <device/pci_type.h> +#include <stdint.h>
#define EHCI_BAR_INDEX 0x10 #define PCI_EHCI_CLASSCODE 0x0c0320 /* USB2.0 with EHCI controller */ diff --git a/src/include/device/pci_rom.h b/src/include/device/pci_rom.h index c49389f..8b04d09 100644 --- a/src/include/device/pci_rom.h +++ b/src/include/device/pci_rom.h @@ -1,8 +1,9 @@ #ifndef PCI_ROM_H #define PCI_ROM_H + #include <endian.h> -#include <stddef.h> #include <acpi/acpi.h> +#include <stdint.h>
#define PCI_ROM_HDR 0xAA55 #define PCI_DATA_HDR ((uint32_t) (('R' << 24) | ('I' << 16) | ('C' << 8) | 'P')) diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h index ca482d2..def7f6c 100644 --- a/src/include/device/pcix.h +++ b/src/include/device/pcix.h @@ -2,6 +2,9 @@ #define DEVICE_PCIX_H /* (c) 2005 Linux Networx GPL see COPYING for details */
+#include <device/device.h> +#include <stdint.h> + void pcix_scan_bridge(struct device *dev);
const char *pcix_speed(u16 sstatus); diff --git a/src/include/elog.h b/src/include/elog.h index ab85544..6c2c531 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -3,6 +3,8 @@ #ifndef ELOG_H_ #define ELOG_H_
+#include <stdint.h> + #define MAX_EVENT_SIZE 0x7F
/* End of log */ diff --git a/src/include/fmap.h b/src/include/fmap.h index a07bae2..761e742 100644 --- a/src/include/fmap.h +++ b/src/include/fmap.h @@ -5,6 +5,8 @@
#include <commonlib/bsd/fmap_serialized.h> #include <commonlib/region.h> +#include <stddef.h> +#include <stdint.h>
/* Locate the named area in the fmap and fill in a region device representing * that area. The region is a sub-region of the readonly boot media. Return diff --git a/src/include/pc80/i8259.h b/src/include/pc80/i8259.h index c3d0a93..9268cd1 100644 --- a/src/include/pc80/i8259.h +++ b/src/include/pc80/i8259.h @@ -3,6 +3,8 @@ #ifndef PC80_I8259_H #define PC80_I8259_H
+#include <stdint.h> + /* * IRQ numbers and common usage * If an IRQ does not say it is 'Reserved' diff --git a/src/include/spd_cache.h b/src/include/spd_cache.h index f8d7d68..5465aad 100644 --- a/src/include/spd_cache.h +++ b/src/include/spd_cache.h @@ -4,6 +4,8 @@ #define __SPD_CACHE_H
#include <spd_bin.h> +#include <stddef.h> +#include <stdint.h>
#define SPD_CACHE_FMAP_NAME "RW_SPD_CACHE" #define SC_SPD_NUMS (CONFIG_DIMM_MAX) diff --git a/src/include/superio/hwm5_conf.h b/src/include/superio/hwm5_conf.h index 661f3ee..9102de2 100644 --- a/src/include/superio/hwm5_conf.h +++ b/src/include/superio/hwm5_conf.h @@ -4,6 +4,7 @@ #define DEVICE_PNP_HWM5_CONF_H
#include <device/pnp.h> +#include <stdint.h>
/* The address/data register pair for the indirect/indexed IO space of the * hardware monitor (HWM) that does temperature and voltage sensing and fan diff --git a/src/include/timestamp.h b/src/include/timestamp.h index 06c99ac..647cd13 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -4,6 +4,7 @@ #define __TIMESTAMP_H__
#include <commonlib/timestamp_serialized.h> +#include <stdint.h>
#if CONFIG(COLLECT_TIMESTAMPS) /*
Hello Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43368
to look at the new patch set (#2).
Change subject: src/include: Add missing includes ......................................................................
src/include: Add missing includes
Change-Id: I746ea7805bae553a146130994d8174aa2e189610 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/include/acpi/acpi_device.h M src/include/acpi/acpi_ivrs.h M src/include/acpi/acpigen.h M src/include/acpi/acpigen_dptf.h M src/include/assert.h M src/include/boot/coreboot_tables.h M src/include/cbfs.h M src/include/cpu/amd/mtrr.h M src/include/cpu/cpu.h M src/include/cpu/intel/l2_cache.h M src/include/cpu/x86/bist.h M src/include/cpu/x86/mp.h M src/include/cpu/x86/smi_deprecated.h M src/include/crc_byte.h M src/include/device/i2c_bus.h M src/include/device/i2c_simple.h M src/include/device/pci_ehci.h M src/include/device/pci_rom.h M src/include/device/pcix.h M src/include/device/smbus_host.h M src/include/device/soundwire.h M src/include/device_tree.h M src/include/elog.h M src/include/fmap.h M src/include/memrange.h M src/include/pc80/i8259.h M src/include/region_file.h M src/include/spd_cache.h M src/include/spi_sdcard.h M src/include/superio/hwm5_conf.h M src/include/timestamp.h 31 files changed, 45 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/43368/2
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43368 )
Change subject: src/include: Add missing includes ......................................................................
Patch Set 4:
(36 comments)
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/acpi/acpi_devic... File src/include/acpi/acpi_device.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/acpi/acpi_devic... PS4, Line 554: ize_t stddef.h
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/acpi/acpi_ivrs.... File src/include/acpi/acpi_ivrs.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/acpi/acpi_ivrs.... PS4, Line 113: uint8_t stdint.h
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/acpi/acpigen.h File src/include/acpi/acpigen.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/acpi/acpigen.h@... PS4, Line 225: size_t count; stddef.h
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/acpi/acpigen_dp... File src/include/acpi/acpigen_dptf.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/acpi/acpigen_dp... PS4, Line 54: uint8_t stdint.h
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/assert.h File src/include/assert.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/assert.h@63 PS4, Line 63: uintptr_t stdint.h
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/boot/coreboot_t... File src/include/boot/coreboot_tables.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/boot/coreboot_t... PS4, Line 14: uintptr_t stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cbfs.h File src/include/cbfs.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cbfs.h@16 PS4, Line 16: uint16_t stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cbfs.h@24 PS4, Line 24: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/amd/mtrr.h File src/include/cpu/amd/mtrr.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/amd/mtrr.h@... PS4, Line 72: uint64_t stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/cpu.h File src/include/cpu/cpu.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/cpu.h@10 PS4, Line 10: uintptr_t stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/intel/l2_ca... File src/include/cpu/intel/l2_cache.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/intel/l2_ca... PS4, Line 73: u32 stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/x86/bist.h File src/include/cpu/x86/bist.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/x86/bist.h@... PS4, Line 7: u32 stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/x86/mp.h File src/include/cpu/x86/mp.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/x86/mp.h@42 PS4, Line 42: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/x86/mp.h@42 PS4, Line 42: uintptr_t stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/x86/smi_dep... File src/include/cpu/x86/smi_deprecated.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/cpu/x86/smi_dep... PS4, Line 18: u32 stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/crc_byte.h File src/include/crc_byte.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/crc_byte.h@39 PS4, Line 39: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/i2c_bus.... File src/include/device/i2c_bus.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/i2c_bus.... PS4, Line 13: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/i2c_simp... File src/include/device/i2c_simple.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/i2c_simp... PS4, Line 26: u8 stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/pci_ehci... File src/include/device/pci_ehci.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/pci_ehci... PS4, Line 18: u8 stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/pci_rom.... File src/include/device/pci_rom.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/pci_rom.... PS4, Line 15: uint16_t stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/pcix.h File src/include/device/pcix.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/pcix.h@8 PS4, Line 8: device device.h
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/pcix.h@1... PS4, Line 10: u16 stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/smbus_ho... File src/include/device/smbus_host.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/smbus_ho... PS4, Line 12: u8 stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/soundwir... File src/include/device/soundwire.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device/soundwir... PS4, Line 87: uint8_t stdint.h
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device_tree.h File src/include/device_tree.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/device_tree.h@1... PS4, Line 148: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/elog.h File src/include/elog.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/elog.h@137 PS4, Line 137: u8 stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/fmap.h File src/include/fmap.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/fmap.h@32 PS4, Line 32: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/fmap.h@39 PS4, Line 39: uint64_t stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/memrange.h File src/include/memrange.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/memrange.h@91 PS4, Line 91: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/pc80/i8259.h File src/include/pc80/i8259.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/pc80/i8259.h@71 PS4, Line 71: u16 stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/region_file.h File src/include/region_file.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/region_file.h@3... PS4, Line 36: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/spd_cache.h File src/include/spd_cache.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/spd_cache.h@19 PS4, Line 19: uint8_t stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/spd_cache.h@19 PS4, Line 19: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/spi_sdcard.h File src/include/spi_sdcard.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/spi_sdcard.h@18 PS4, Line 18: size_t stddef.h
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/superio/hwm5_co... File src/include/superio/hwm5_conf.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/superio/hwm5_co... PS4, Line 26: u16 stdint
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/timestamp.h File src/include/timestamp.h:
https://review.coreboot.org/c/coreboot/+/43368/4/src/include/timestamp.h@16 PS4, Line 16: uint64_t stdint
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43368
to look at the new patch set (#5).
Change subject: src/include: Add missing includes ......................................................................
src/include: Add missing includes
Change-Id: I746ea7805bae553a146130994d8174aa2e189610 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/include/acpi/acpi_device.h M src/include/acpi/acpi_ivrs.h M src/include/acpi/acpigen.h M src/include/acpi/acpigen_dptf.h M src/include/assert.h M src/include/boot/coreboot_tables.h M src/include/cbfs.h M src/include/cpu/amd/mtrr.h M src/include/cpu/cpu.h M src/include/cpu/intel/l2_cache.h M src/include/cpu/x86/bist.h M src/include/cpu/x86/mp.h M src/include/cpu/x86/smi_deprecated.h M src/include/crc_byte.h M src/include/device/i2c_bus.h M src/include/device/i2c_simple.h M src/include/device/pci_ehci.h M src/include/device/pci_rom.h M src/include/device/pcix.h M src/include/device/smbus_host.h M src/include/device/soundwire.h M src/include/device_tree.h M src/include/elog.h M src/include/fmap.h M src/include/memrange.h M src/include/pc80/i8259.h M src/include/region_file.h M src/include/spd_cache.h M src/include/spi_sdcard.h M src/include/superio/hwm5_conf.h M src/include/timestamp.h 31 files changed, 45 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/43368/5
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43368
to look at the new patch set (#6).
Change subject: src/include: Add missing includes ......................................................................
src/include: Add missing includes
Change-Id: I746ea7805bae553a146130994d8174aa2e189610 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/include/acpi/acpi_device.h M src/include/acpi/acpi_ivrs.h M src/include/acpi/acpigen.h M src/include/acpi/acpigen_dptf.h M src/include/assert.h M src/include/boot/coreboot_tables.h M src/include/cbfs.h M src/include/cpu/amd/mtrr.h M src/include/cpu/cpu.h M src/include/cpu/intel/l2_cache.h M src/include/cpu/x86/bist.h M src/include/cpu/x86/mp.h M src/include/cpu/x86/smi_deprecated.h M src/include/crc_byte.h M src/include/device/i2c_bus.h M src/include/device/i2c_simple.h M src/include/device/pci_ehci.h M src/include/device/pci_rom.h M src/include/device/pcix.h M src/include/device/smbus_host.h M src/include/device/soundwire.h M src/include/device_tree.h M src/include/elog.h M src/include/fmap.h M src/include/memrange.h M src/include/pc80/i8259.h M src/include/region_file.h M src/include/spd_cache.h M src/include/spi_sdcard.h M src/include/superio/hwm5_conf.h M src/include/timestamp.h 31 files changed, 45 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/43368/6
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43368 )
Change subject: src/include: Add missing includes ......................................................................
Patch Set 6:
(36 comments)
I've added comments to make the review easy. Thx
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/acpi/acpi_devic... File src/include/acpi/acpi_device.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/acpi/acpi_devic... PS6, Line 362: BIT(2) needs <types.h>
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/acpi/acpi_ivrs.... File src/include/acpi/acpi_ivrs.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/acpi/acpi_ivrs.... PS6, Line 113: uint8_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/acpi/acpigen.h File src/include/acpi/acpigen.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/acpi/acpigen.h@... PS6, Line 225: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/acpi/acpigen_dp... File src/include/acpi/acpigen_dptf.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/acpi/acpigen_dp... PS6, Line 54: uint8_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/assert.h File src/include/assert.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/assert.h@63 PS6, Line 63: uintptr_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/boot/coreboot_t... File src/include/boot/coreboot_tables.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/boot/coreboot_t... PS6, Line 14: uintptr_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cbfs.h File src/include/cbfs.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cbfs.h@16 PS6, Line 16: uint16_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cbfs.h@24 PS6, Line 24: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/amd/mtrr.h File src/include/cpu/amd/mtrr.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/amd/mtrr.h@... PS6, Line 72: uint64_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/cpu.h File src/include/cpu/cpu.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/cpu.h@10 PS6, Line 10: uintptr_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/intel/l2_ca... File src/include/cpu/intel/l2_cache.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/intel/l2_ca... PS6, Line 73: u32 stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/x86/bist.h File src/include/cpu/x86/bist.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/x86/bist.h@... PS6, Line 7: u32 stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/x86/mp.h File src/include/cpu/x86/mp.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/x86/mp.h@42 PS6, Line 42: void (*get_smm_info)(uintptr_t *perm_smbase, size_t *perm_smsize, stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/x86/mp.h@79 PS6, Line 79: uintptr_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/x86/smi_dep... File src/include/cpu/x86/smi_deprecated.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/cpu/x86/smi_dep... PS6, Line 18: u32 stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/crc_byte.h File src/include/crc_byte.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/crc_byte.h@39 PS6, Line 39: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/i2c_bus.... File src/include/device/i2c_bus.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/i2c_bus.... PS6, Line 13: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/i2c_simp... File src/include/device/i2c_simple.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/i2c_simp... PS6, Line 26: u8 stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/pci_ehci... File src/include/device/pci_ehci.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/pci_ehci... PS6, Line 18: u8 stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/pci_rom.... File src/include/device/pci_rom.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/pci_rom.... PS6, Line 15: uint16_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/pcix.h File src/include/device/pcix.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/pcix.h@8 PS6, Line 8: struct device device.h
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/pcix.h@1... PS6, Line 10: u16 stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/smbus_ho... File src/include/device/smbus_host.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/smbus_ho... PS6, Line 24: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/soundwir... File src/include/device/soundwire.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device/soundwir... PS6, Line 133: BIT(port) needs <types.h>
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device_tree.h File src/include/device_tree.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/device_tree.h@1... PS6, Line 148: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/elog.h File src/include/elog.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/elog.h@124 PS6, Line 124: u8 stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/fmap.h File src/include/fmap.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/fmap.h@32 PS6, Line 32: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/fmap.h@39 PS6, Line 39: uint64_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/memrange.h File src/include/memrange.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/memrange.h@91 PS6, Line 91: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/pc80/i8259.h File src/include/pc80/i8259.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/pc80/i8259.h@71 PS6, Line 71: u16 stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/region_file.h File src/include/region_file.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/region_file.h@3... PS6, Line 36: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/spd_cache.h File src/include/spd_cache.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/spd_cache.h@19 PS6, Line 19: uint8_t stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/spd_cache.h@20 PS6, Line 20: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/spi_sdcard.h File src/include/spi_sdcard.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/spi_sdcard.h@18 PS6, Line 18: size_t stddef
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/superio/hwm5_co... File src/include/superio/hwm5_conf.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/superio/hwm5_co... PS6, Line 26: u8 stdint
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/timestamp.h File src/include/timestamp.h:
https://review.coreboot.org/c/coreboot/+/43368/6/src/include/timestamp.h@16 PS6, Line 16: uint64_t stdint
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43368 )
Change subject: src/include: Add missing includes ......................................................................
Patch Set 6: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43368 )
Change subject: src/include: Add missing includes ......................................................................
src/include: Add missing includes
Change-Id: I746ea7805bae553a146130994d8174aa2e189610 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/43368 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/include/acpi/acpi_device.h M src/include/acpi/acpi_ivrs.h M src/include/acpi/acpigen.h M src/include/acpi/acpigen_dptf.h M src/include/assert.h M src/include/boot/coreboot_tables.h M src/include/cbfs.h M src/include/cpu/amd/mtrr.h M src/include/cpu/cpu.h M src/include/cpu/intel/l2_cache.h M src/include/cpu/x86/bist.h M src/include/cpu/x86/mp.h M src/include/cpu/x86/smi_deprecated.h M src/include/crc_byte.h M src/include/device/i2c_bus.h M src/include/device/i2c_simple.h M src/include/device/pci_ehci.h M src/include/device/pci_rom.h M src/include/device/pcix.h M src/include/device/smbus_host.h M src/include/device/soundwire.h M src/include/device_tree.h M src/include/elog.h M src/include/fmap.h M src/include/memrange.h M src/include/pc80/i8259.h M src/include/region_file.h M src/include/spd_cache.h M src/include/spi_sdcard.h M src/include/superio/hwm5_conf.h M src/include/timestamp.h 31 files changed, 45 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/include/acpi/acpi_device.h b/src/include/acpi/acpi_device.h index 6287ba1..be13bd7 100644 --- a/src/include/acpi/acpi_device.h +++ b/src/include/acpi/acpi_device.h @@ -4,8 +4,8 @@ #define __ACPI_ACPI_DEVICE_H__
#include <device/i2c.h> -#include <stdint.h> #include <spi-generic.h> +#include <types.h>
enum acpi_dp_type { ACPI_DP_TYPE_UNKNOWN, diff --git a/src/include/acpi/acpi_ivrs.h b/src/include/acpi/acpi_ivrs.h index 82748d0..de3bdea 100644 --- a/src/include/acpi/acpi_ivrs.h +++ b/src/include/acpi/acpi_ivrs.h @@ -11,6 +11,8 @@ #ifndef __ACPI_ACPI_IVRS_H__ #define __ACPI_ACPI_IVRS_H__
+#include <stdint.h> + /* I/O Virtualization Reporting Structure (IVRS) */ #define IVHD_BLOCK_TYPE_LEGACY__FIXED 0x10 #define IVHD_BLOCK_TYPE_FULL__FIXED 0x11 diff --git a/src/include/acpi/acpigen.h b/src/include/acpi/acpigen.h index 98a9fe4..4525b6b 100644 --- a/src/include/acpi/acpigen.h +++ b/src/include/acpi/acpigen.h @@ -3,6 +3,7 @@ #ifndef __ACPI_ACPIGEN_H__ #define __ACPI_ACPIGEN_H__
+#include <stddef.h> #include <stdint.h> #include <acpi/acpi.h> #include <acpi/acpi_device.h> diff --git a/src/include/acpi/acpigen_dptf.h b/src/include/acpi/acpigen_dptf.h index 1790df7..b173bb8 100644 --- a/src/include/acpi/acpigen_dptf.h +++ b/src/include/acpi/acpigen_dptf.h @@ -5,6 +5,7 @@
#include <device/device.h> #include <stdbool.h> +#include <stdint.h>
/* A common idiom is to use a default value if none is provided (i.e., == 0) */ #define DEFAULT_IF_0(thing, default_) ((thing) ? (thing) : (default_)) diff --git a/src/include/assert.h b/src/include/assert.h index 8c19c1c..0463175 100644 --- a/src/include/assert.h +++ b/src/include/assert.h @@ -5,6 +5,7 @@
#include <arch/hlt.h> #include <console/console.h> +#include <stdint.h>
/* TODO: Fix vendorcode headers to not define macros coreboot uses or to be more properly isolated. */ diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index 5bebd4a..7fd9ac1 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -3,6 +3,8 @@
#include <commonlib/coreboot_tables.h> #include <stddef.h> +#include <stdint.h> + /* function prototypes for building the coreboot table */
/* diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 29621c6..a35597d 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -5,6 +5,8 @@
#include <commonlib/cbfs.h> #include <program_loading.h> +#include <stddef.h> +#include <stdint.h>
/*********************************************** * Perform CBFS operations on the boot device. * diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index 906a7c0..608a9df 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -41,6 +41,7 @@ #if !defined(__ASSEMBLER__)
#include <cpu/x86/msr.h> +#include <stdint.h>
void amd_setup_mtrrs(void); struct device; diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h index db324b6da..99249ba 100644 --- a/src/include/cpu/cpu.h +++ b/src/include/cpu/cpu.h @@ -2,6 +2,7 @@ #define CPU_CPU_H
#include <arch/cpu.h> +#include <stdint.h>
void cpu_initialize(unsigned int cpu_index); /* Returns default APIC id based on logical_cpu number or < 0 on failure. */ diff --git a/src/include/cpu/intel/l2_cache.h b/src/include/cpu/intel/l2_cache.h index 1c33c24..ceddf1d 100644 --- a/src/include/cpu/intel/l2_cache.h +++ b/src/include/cpu/intel/l2_cache.h @@ -13,6 +13,8 @@ #ifndef __P6_L2_CACHE_H #define __P6_L2_CACHE_H
+#include <stdint.h> + #define EBL_CR_POWERON 0x2A
#define BBL_CR_D0 0x88 diff --git a/src/include/cpu/x86/bist.h b/src/include/cpu/x86/bist.h index 9535e69..eb34c97 100644 --- a/src/include/cpu/x86/bist.h +++ b/src/include/cpu/x86/bist.h @@ -2,6 +2,7 @@ #define CPU_X86_BIST_H
#include <console/console.h> +#include <stdint.h>
static inline void report_bist_failure(u32 bist) { diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h index 04f7804..b2704eb 100644 --- a/src/include/cpu/x86/mp.h +++ b/src/include/cpu/x86/mp.h @@ -5,6 +5,8 @@
#include <arch/smp/atomic.h> #include <cpu/x86/smm.h> +#include <stddef.h> +#include <stdint.h>
#define CACHELINE_SIZE 64
diff --git a/src/include/cpu/x86/smi_deprecated.h b/src/include/cpu/x86/smi_deprecated.h index d7f3c7f..c20f21b 100644 --- a/src/include/cpu/x86/smi_deprecated.h +++ b/src/include/cpu/x86/smi_deprecated.h @@ -3,6 +3,8 @@ #ifndef __X86_SMI_DEPRECATED_H__ #define __X86_SMI_DEPRECATED_H__
+#include <stdint.h> + #if CONFIG(PARALLEL_MP) || !CONFIG(HAVE_SMI_HANDLER) /* Empty stubs for platforms without SMI handlers. */ static inline void smm_init(void) { } diff --git a/src/include/crc_byte.h b/src/include/crc_byte.h index 2e93fe9..85b7221 100644 --- a/src/include/crc_byte.h +++ b/src/include/crc_byte.h @@ -3,6 +3,7 @@ #ifndef CRC_BYTE_H #define CRC_BYTE_H
+#include <stddef.h> #include <stdint.h>
/* This function is used to calculate crc7 byte by byte, with polynomial diff --git a/src/include/device/i2c_bus.h b/src/include/device/i2c_bus.h index 0e35a61..b5e7710 100644 --- a/src/include/device/i2c_bus.h +++ b/src/include/device/i2c_bus.h @@ -3,6 +3,7 @@ #ifndef _DEVICE_I2C_BUS_H_ #define _DEVICE_I2C_BUS_H_
+#include <stddef.h> #include <stdint.h> #include <device/i2c.h> #include <device/device.h> diff --git a/src/include/device/i2c_simple.h b/src/include/device/i2c_simple.h index 03d6828..de1c0eb 100644 --- a/src/include/device/i2c_simple.h +++ b/src/include/device/i2c_simple.h @@ -5,6 +5,7 @@
#include <commonlib/helpers.h> #include <device/i2c.h> +#include <stdint.h>
int platform_i2c_transfer(unsigned int bus, struct i2c_msg *segments, int count); diff --git a/src/include/device/pci_ehci.h b/src/include/device/pci_ehci.h index c3bcdc9..e7a445d 100644 --- a/src/include/device/pci_ehci.h +++ b/src/include/device/pci_ehci.h @@ -5,6 +5,7 @@
#include <device/device.h> #include <device/pci_type.h> +#include <stdint.h>
#define EHCI_BAR_INDEX 0x10 #define PCI_EHCI_CLASSCODE 0x0c0320 /* USB2.0 with EHCI controller */ diff --git a/src/include/device/pci_rom.h b/src/include/device/pci_rom.h index c49389f..8b04d09 100644 --- a/src/include/device/pci_rom.h +++ b/src/include/device/pci_rom.h @@ -1,8 +1,9 @@ #ifndef PCI_ROM_H #define PCI_ROM_H + #include <endian.h> -#include <stddef.h> #include <acpi/acpi.h> +#include <stdint.h>
#define PCI_ROM_HDR 0xAA55 #define PCI_DATA_HDR ((uint32_t) (('R' << 24) | ('I' << 16) | ('C' << 8) | 'P')) diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h index ca482d2..def7f6c 100644 --- a/src/include/device/pcix.h +++ b/src/include/device/pcix.h @@ -2,6 +2,9 @@ #define DEVICE_PCIX_H /* (c) 2005 Linux Networx GPL see COPYING for details */
+#include <device/device.h> +#include <stdint.h> + void pcix_scan_bridge(struct device *dev);
const char *pcix_speed(u16 sstatus); diff --git a/src/include/device/smbus_host.h b/src/include/device/smbus_host.h index 4bc8009..e113aec 100644 --- a/src/include/device/smbus_host.h +++ b/src/include/device/smbus_host.h @@ -3,6 +3,7 @@ #ifndef __DEVICE_SMBUS_HOST_H__ #define __DEVICE_SMBUS_HOST_H__
+#include <stddef.h> #include <stdint.h> #include <console/console.h>
diff --git a/src/include/device/soundwire.h b/src/include/device/soundwire.h index 85e3186..6f966ae 100644 --- a/src/include/device/soundwire.h +++ b/src/include/device/soundwire.h @@ -16,8 +16,7 @@ #ifndef __DEVICE_SOUNDWIRE_H__ #define __DEVICE_SOUNDWIRE_H__
-#include <stdbool.h> -#include <stdint.h> +#include <types.h>
/** * enum soundwire_limits - Limits on number of SoundWire devices in topology. diff --git a/src/include/device_tree.h b/src/include/device_tree.h index bd0d151..b70f5aa 100644 --- a/src/include/device_tree.h +++ b/src/include/device_tree.h @@ -4,6 +4,7 @@ #ifndef __DEVICE_TREE_H__ #define __DEVICE_TREE_H__
+#include <stddef.h> #include <stdint.h> #include <list.h>
diff --git a/src/include/elog.h b/src/include/elog.h index ab85544..6c2c531 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -3,6 +3,8 @@ #ifndef ELOG_H_ #define ELOG_H_
+#include <stdint.h> + #define MAX_EVENT_SIZE 0x7F
/* End of log */ diff --git a/src/include/fmap.h b/src/include/fmap.h index a07bae2..761e742 100644 --- a/src/include/fmap.h +++ b/src/include/fmap.h @@ -5,6 +5,8 @@
#include <commonlib/bsd/fmap_serialized.h> #include <commonlib/region.h> +#include <stddef.h> +#include <stdint.h>
/* Locate the named area in the fmap and fill in a region device representing * that area. The region is a sub-region of the readonly boot media. Return diff --git a/src/include/memrange.h b/src/include/memrange.h index 2b8c00e..72cfa72 100644 --- a/src/include/memrange.h +++ b/src/include/memrange.h @@ -4,6 +4,7 @@
#include <device/resource.h> #include <stdbool.h> +#include <stddef.h>
/* A memranges structure consists of a list of range_entry(s). The structure * is exposed so that a memranges can be used on the stack if needed. */ diff --git a/src/include/pc80/i8259.h b/src/include/pc80/i8259.h index c3d0a93..9268cd1 100644 --- a/src/include/pc80/i8259.h +++ b/src/include/pc80/i8259.h @@ -3,6 +3,8 @@ #ifndef PC80_I8259_H #define PC80_I8259_H
+#include <stdint.h> + /* * IRQ numbers and common usage * If an IRQ does not say it is 'Reserved' diff --git a/src/include/region_file.h b/src/include/region_file.h index 0df64e5..063e0e0 100644 --- a/src/include/region_file.h +++ b/src/include/region_file.h @@ -4,6 +4,7 @@ #define REGION_FILE_H
#include <commonlib/region.h> +#include <stddef.h> #include <stdint.h>
/* diff --git a/src/include/spd_cache.h b/src/include/spd_cache.h index f8d7d68..5465aad 100644 --- a/src/include/spd_cache.h +++ b/src/include/spd_cache.h @@ -4,6 +4,8 @@ #define __SPD_CACHE_H
#include <spd_bin.h> +#include <stddef.h> +#include <stdint.h>
#define SPD_CACHE_FMAP_NAME "RW_SPD_CACHE" #define SC_SPD_NUMS (CONFIG_DIMM_MAX) diff --git a/src/include/spi_sdcard.h b/src/include/spi_sdcard.h index 028f6a3..8f64e5e 100644 --- a/src/include/spi_sdcard.h +++ b/src/include/spi_sdcard.h @@ -3,6 +3,8 @@ #ifndef _SPI_SDCARD_H_ #define _SPI_SDCARD_H_
+#include <stddef.h> + struct spi_sdcard { int type; struct spi_slave slave; diff --git a/src/include/superio/hwm5_conf.h b/src/include/superio/hwm5_conf.h index 661f3ee..9102de2 100644 --- a/src/include/superio/hwm5_conf.h +++ b/src/include/superio/hwm5_conf.h @@ -4,6 +4,7 @@ #define DEVICE_PNP_HWM5_CONF_H
#include <device/pnp.h> +#include <stdint.h>
/* The address/data register pair for the indirect/indexed IO space of the * hardware monitor (HWM) that does temperature and voltage sensing and fan diff --git a/src/include/timestamp.h b/src/include/timestamp.h index 06c99ac..647cd13 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -4,6 +4,7 @@ #define __TIMESTAMP_H__
#include <commonlib/timestamp_serialized.h> +#include <stdint.h>
#if CONFIG(COLLECT_TIMESTAMPS) /*
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HAOUAS Elyes (Code Review)
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