Patch merged into coreboot/master: 6ecaf65 Baytrail: add _PRT to each PCIe root port device

the following patch was just integrated into master:
commit 6ecaf65bffde68d60a53aeeeb62db43c4fa6c5c9
Author: Ted Kuo 
Date:   Tue Sep 16 15:31:21 2014 +0800

Baytrail: add _PRT to each PCIe root port device

Report PCI routing table of all PCIe root ports for legacy interrupt.
    Some PCIe devices using legacy interrupt can't work if PCI routing table
    isn't defined. It's necessary and defined in BWG Chapter 28.1.3.

BUG=chrome-os-partner:31943
    TEST=compiled and tested
    BRANCH=NONE
    Signed-off-by: Ted Kuo

Change-Id: I2c684edfd1fc624bed471783584250cd9f5e66f5
    Signed-off-by: Stefan Reinauer 
    Original-Commit-Id: b9040d564a32607327057a84b9aab14e66cd5b45
    Original-Change-Id: Ia15ced6c5fdcc6712e5f2831e42c6dee320f166b
    Original-Reviewed-on: https://chromium-review.googlesource.com/218422
    Original-Reviewed-by: Aaron Durbin 
    Original-Reviewed-by: Ted Kuo 
    Original-Commit-Queue: Ted Kuo 
    Original-Tested-by: Ted Kuo 
    Reviewed-on: http://review.coreboot.org/9201
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi

See http://review.coreboot.org/9201 for details.

-gerrit