[S] Change in coreboot[main]: soc/intel/xeon_sp: Report PCIe integrated end points under DRHD

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/84315?usp=email )

Change subject: soc/intel/xeon_sp: Report PCIe integrated end points under DRHD
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Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84315/comment/179ad648_8c1f3f63?usp... :
PS1, Line 9: In case of a PCH-less platform, all RCiEPs should be listed under
           : its specific DRHD
> Could you provide a bit more explanation? Reporting all endpoint devices was not needed on previous  […]

I guess that is because in SPR, DRHD_INCLUDE_PCI_ALL is used for all device without explicit DRHD affiliation. However, that might indicate incorrect DRHD affiliation relationship for these PCIe integrated end point devices.