Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/25602
Change subject: nb/intel/pineview: Use parallel MP init ......................................................................
nb/intel/pineview: Use parallel MP init
Untested.
Change-Id: I89f7d514d75fe933c3a8858da37004419189674b Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/pineview/northbridge.c 2 files changed, 2 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/25602/1
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig index 047aa8b..9e5a1c1 100644 --- a/src/northbridge/intel/pineview/Kconfig +++ b/src/northbridge/intel/pineview/Kconfig @@ -30,6 +30,7 @@ select RELOCATABLE_RAMSTAGE select INTEL_GMA_ACPI select SMM_TSEG + select PARALLEL_MP
config BOOTBLOCK_NORTHBRIDGE_INIT string diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index cf6c5ce..296127b 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -145,26 +145,6 @@ pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), SMRAM, smram); }
-/* - * Really doesn't belong here but will go away with parallel mp init, - * so let it be here for a while... - */ -int cpu_get_apic_id_map(int *apic_id_map) -{ - unsigned int i; - - /* Logical processors (threads) per core */ - const struct cpuid_result cpuid1 = cpuid(1); - /* Read number of cores. */ - const char cores = (cpuid1.ebx >> 16) & 0xf; - - /* TODO in parallel MP cpuid(1).ebx */ - for (i = 0; i < cores; i++) - apic_id_map[i] = i; - - return cores; -} - static void mch_domain_set_resources(device_t dev) { struct resource *res; @@ -196,7 +176,7 @@
static void cpu_bus_init(device_t dev) { - initialize_cpus(dev->link_list); + bsp_init_and_start_aps(dev->link_list); }
static struct device_operations cpu_bus_ops = {