Change in coreboot[master]: soc/intel/cannonlake: Define Max PCIE Root Ports

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Change subject: soc/intel/cannonlake: Define Max PCIE Root Ports
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Patch Set 2: Verified+1

Build Successful

https://qa.coreboot.org/job/coreboot-checkpatch/14973/ : SUCCESS

https://qa.coreboot.org/job/coreboot-gerrit/59700/ : SUCCESS