[M] Change in coreboot[master]: soc/intel/meteorlake: support Power Limits and Voltage Regulator

[Jérémy Compostella (Code Review)]

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal.

Hello Tarun Tuli, Subrata Banik, Kapil Porwal,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/74572

to look at the new patch set (#2).

Change subject: soc/intel/meteorlake: support Power Limits and Voltage Regulator
......................................................................

soc/intel/meteorlake: support Power Limits and Voltage Regulator

Power Limits and Voltage Regulator settings are the result of at
least the following combination of factors:
- The voltage regular itself
- The TDP/SoC used
- The board design (extra chips, cooling system, ...)
- The Operating System and the use-cases
- Power and performance measurements and tuning

Those settings being board design and use-case specific, they cannot
be reduced to simple database indexed on a SoC ID and TDP. They must
factor in the board itself.

Therefor, this patch adds support to apply Power Limits and Voltage
Regulator settings supplied by a board specific database.

Note that the FSP includes default Power Limits and Voltage Regulator
settings. These settings may be good enough for basic board bring-up
but should be refined per board design.

BRANCH=None
BUG=b:262499722
TEST=TBD

Change-Id: Ia1a6d4872718730951591cde6677557eebe3a944
Signed-off-by: Jeremy Compostella 
---
M src/soc/intel/meteorlake/chip.h
M src/soc/intel/meteorlake/chipset.cb
M src/soc/intel/meteorlake/romstage/fsp_params.c
M src/soc/intel/meteorlake/systemagent.c
4 files changed, 135 insertions(+), 44 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/74572/2