Change in coreboot[master]: sb/lynxpoint: add missing USB port defs

[Martin Roth (Code Review)]

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/19965 )

Change subject: sb/lynxpoint: add missing USB port defs
......................................................................

sb/lynxpoint: add missing USB port defs

Add device/address stubs for XHCI USB ports 7, 10-13.
Stub data will be supplemented by board-specific info
added in subsequent commits.

Change-Id: I7d2f93351435cccd62e8fe4d95ad3467aa09de69
Signed-off-by: Matt DeVillier 
Reviewed-on: https://review.coreboot.org/19965
Reviewed-by: Martin Roth 
Tested-by: build bot (Jenkins) 
---
M src/southbridge/intel/lynxpoint/acpi/usb.asl
1 file changed, 5 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Martin Roth: Looks good to me, approved

diff --git a/src/southbridge/intel/lynxpoint/acpi/usb.asl b/src/southbridge/intel/lynxpoint/acpi/usb.asl
index 85e4390..ee88303 100644
--- a/src/southbridge/intel/lynxpoint/acpi/usb.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/usb.asl
@@ -49,7 +49,6 @@
    {
    	Name (_ADR, 0x00000000)

-		// How many are there?
    	Device (PRT1) { Name (_ADR, 1) } // USB Port 0
    	Device (PRT2) { Name (_ADR, 2) } // USB Port 1
    	Device (PRT3) { Name (_ADR, 3) } // USB Port 2
@@ -409,12 +408,16 @@
    		Return (PCKG)
    	}

-		// How many are there?
    	Device (PRT1) { Name (_ADR, 1) } // USB Port 0
    	Device (PRT2) { Name (_ADR, 2) } // USB Port 1
    	Device (PRT3) { Name (_ADR, 3) } // USB Port 2
    	Device (PRT4) { Name (_ADR, 4) } // USB Port 3
    	Device (PRT5) { Name (_ADR, 5) } // USB Port 4
    	Device (PRT6) { Name (_ADR, 6) } // USB Port 5
+		Device (PRT7) { Name (_ADR, 7) } // USB Port 6
+		Device (SSP1) { Name (_ADR, 10) } // USB Port 10
+		Device (SSP2) { Name (_ADR, 11) } // USB Port 11
+		Device (SSP3) { Name (_ADR, 12) } // USB Port 12
+		Device (SSP4) { Name (_ADR, 13) } // USB Port 13
    }
 }