Change in coreboot[master]: mb/google/dedede/var/drawcia: Add FW_CONFIG probe for EXT_VR

[Tony Huang (Code Review)]

Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63075 )

Change subject: mb/google/dedede/var/drawcia: Add FW_CONFIG probe for EXT_VR
......................................................................

mb/google/dedede/var/drawcia: Add FW_CONFIG probe for EXT_VR

Add FW_CONFIG probe for don't stuffing Anpec APW8738 VNN power IC.
If removed the VNN power IC then "disable_external_bypass_vr" should be set to "1" to disable.

BUG=b:223687184
BRANCH=dedede
TEST=test for enter S0ix and resume normally by powerd_dbus_suspend

Change-Id: Id9ee07b2dd7d5a3a342491778c9f6f30f31eb1f9
Signed-off-by: Tony Huang 
---
M src/mainboard/google/dedede/variants/drawcia/ramstage.c
1 file changed, 12 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/63075/1

diff --git a/src/mainboard/google/dedede/variants/drawcia/ramstage.c b/src/mainboard/google/dedede/variants/drawcia/ramstage.c
index 26f1532..458ae67 100644
--- a/src/mainboard/google/dedede/variants/drawcia/ramstage.c
+++ b/src/mainboard/google/dedede/variants/drawcia/ramstage.c
@@ -4,6 +4,16 @@
 #include <boardid.h>
 #include <device/device.h>
 #include <drivers/usb/acpi/chip.h>
+#include <fw_config.h>
+#include <soc/soc_chip.h>
+
+static void ext_vr_update(void)
+{
+        struct soc_intel_jasperlake_config *cfg = config_of_soc();
+
+        if (fw_config_probe(FW_CONFIG(EXT_VR, EXT_VR_ABSENT)))
+                cfg->disable_external_bypass_vr = 1;
+}

void variant_devtree_update(void)
 {
@@ -21,4 +31,6 @@

config = config_of(lte_usb2);
    config->reset_gpio = lte_reset_gpio;
+
+	ext_vr_update();
 }