[S] Change in coreboot[main]: soc/intel/common/gpio: support 16-bit CPU Port ID

[Subrata Banik (Code Review)]

Attention is currently required from: Bora Guvendik, Cliff Huang, Jamie Ryu, Jérémy Compostella, Paul Menzel, Saurabh Mishra, Wonkyu Kim.

Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/83981?usp=email )

Change subject: soc/intel/common/gpio: support 16-bit CPU Port ID
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Patch Set 8:

(3 comments)

Patchset:

PS7:
> 8.13.1 and 8.13.2 has 16-bit Port ID info. We are also working on vw info for external.

Acknowledged

Commit Message:

https://review.coreboot.org/c/coreboot/+/83981/comment/735655d0_7b11d8b9?usp... :
PS4, Line 13: vw_index and position are not continuous in between groups within a
            :   community.
> > I've asked this morning. waiting for response. […]

Acknowledged

File src/soc/intel/common/block/gpio/gpio.c:

https://review.coreboot.org/c/coreboot/+/83981/comment/7a15a519_d59fda9f?usp... :
PS4, Line 1071: 			}
> In fact, in MTL, community 3 GPP_H starts from vw 16h. This can be fixed using: 
> .vw_base = 0x16,
>
> currently, it is:
> .vw_base = DEFAULT_VW_BASE

we shall discuss this as part of CB:83997