Change in coreboot[master]: util: Add DDR4 generic SPD for MT40A512M16TB-062E:R

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55164 )

Change subject: util: Add DDR4 generic SPD for MT40A512M16TB-062E:R
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util: Add DDR4 generic SPD for MT40A512M16TB-062E:R

Add SPD support for DDR4 memory part

BUG=b:190020997
TEST=none

Change-Id: I423131cb674e1e5ec699c7a28e5b5e6746247b2a
Signed-off-by: Wisley Chen 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55164
Reviewed-by: Nick Vaccaro 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt
M util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
2 files changed, 13 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nick Vaccaro: Looks good to me, approved

diff --git a/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt b/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt
index 96fb261..4fdf0dd 100644
--- a/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt
+++ b/src/soc/intel/tigerlake/spd/ddr4_spd_manifest.generated.txt
@@ -15,3 +15,5 @@
 H5ANAG6NDMR-XNC,ddr4-spd-2.hex
 H5ANAG6NCJR-XNC,ddr4-spd-9.hex
 K4AAG165WB-BCWE,ddr4-spd-9.hex
+MT40A1G16RC-062E:B,ddr4-spd-9.hex
+MT40A512M16TB-062E:R,ddr4-spd-1.hex
diff --git a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
index 03c6630..18e6052 100644
--- a/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
+++ b/util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt
@@ -227,6 +227,17 @@
                 "packageBusWidth": 16,
                 "ranksPerPackage": 1
             }
+        },
+        {
+            "name": "MT40A512M16TB-062E:R",
+            "attribs": {
+                "speedMTps": 3200,
+                "CL_nRCD_nRP": 22,
+                "capacityPerDieGb": 8,
+                "diesPerPackage": 1,
+                "packageBusWidth": 16,
+                "ranksPerPackage": 1
+            }
         }
     ]
 }