Keno Fischer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33286
Change subject: soc/intel: Add some missing MCH PCIe IDs ......................................................................
soc/intel: Add some missing MCH PCIe IDs
These are documented in the Intel Datasheet entitled
"6th Generation Intel® Processor Datasheet for S-Platforms" "6th Generation Intel® Processor Datasheet for H-Platforms" (Volume 2)
Without them, coreboot fails to properly inform the payload of the amount of available memory.
Signed-off-by: Keno Fischer keno@juliacomputing.com Change-Id: I5b810c6415c4aa0404e5fa318d2c8db292566b8a --- M src/include/device/pci_ids.h M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/skylake/bootblock/report_platform.c 3 files changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/33286/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index a35e134..fd90396 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3076,7 +3076,10 @@ #define PCI_DEVICE_ID_INTEL_SKL_ID_U 0x1904 #define PCI_DEVICE_ID_INTEL_SKL_ID_Y 0x190c #define PCI_DEVICE_ID_INTEL_SKL_ID_ULX 0x1924 +#define PCI_DEVICE_ID_INTEL_SKL_ID_H_2 0x1900 #define PCI_DEVICE_ID_INTEL_SKL_ID_H 0x1910 +#define PCI_DEVICE_ID_INTEL_SKL_ID_S_2 0x190f +#define PCI_DEVICE_ID_INTEL_SKL_ID_S_4 0x191f #define PCI_DEVICE_ID_INTEL_KBL_ID_S 0x590f #define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM 0x1918 #define PCI_DEVICE_ID_INTEL_SKL_ID_DT 0x191f diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 281a7f7..a93db65 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -341,6 +341,9 @@ PCI_DEVICE_ID_INTEL_SKL_ID_Y, PCI_DEVICE_ID_INTEL_SKL_ID_ULX, PCI_DEVICE_ID_INTEL_SKL_ID_H, + PCI_DEVICE_ID_INTEL_SKL_ID_H_2, + PCI_DEVICE_ID_INTEL_SKL_ID_S_2, + PCI_DEVICE_ID_INTEL_SKL_ID_S_4, PCI_DEVICE_ID_INTEL_WHL_ID_Wx2, PCI_DEVICE_ID_INTEL_WHL_ID_Wx4, PCI_DEVICE_ID_INTEL_KBL_ID_S, diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 1e81809..e201a0a 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -53,6 +53,9 @@ { PCI_DEVICE_ID_INTEL_SKL_ID_H, "Skylake-H" }, { PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" }, { PCI_DEVICE_ID_INTEL_SKL_ID_DT, "Skylake-DT" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_H_2, "Skylake-H (2 Core)" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_S_2, "Skylake-S (2 Core)" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_S_4, "Skylake-S (4 Core)" }, { PCI_DEVICE_ID_INTEL_KBL_ID_U, "Kabylake-U" }, { PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"}, { PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" },
ron minnich has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33286 )
Change subject: soc/intel: Add some missing MCH PCIe IDs ......................................................................
Patch Set 1: Code-Review+2
Nice work. Welcome to coreboot. There is no escape.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33286 )
Change subject: soc/intel: Add some missing MCH PCIe IDs ......................................................................
Patch Set 1: Code-Review+2
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33286 )
Change subject: soc/intel: Add some missing MCH PCIe IDs ......................................................................
Patch Set 1: Code-Review+1
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33286 )
Change subject: soc/intel: Add some missing MCH PCIe IDs ......................................................................
Patch Set 1: Code-Review+2
Felix Held has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33286 )
Change subject: soc/intel: Add some missing MCH PCIe IDs ......................................................................
soc/intel: Add some missing MCH PCIe IDs
These are documented in the Intel Datasheet entitled
"6th Generation Intel® Processor Datasheet for S-Platforms" "6th Generation Intel® Processor Datasheet for H-Platforms" (Volume 2)
Without them, coreboot fails to properly inform the payload of the amount of available memory.
Signed-off-by: Keno Fischer keno@juliacomputing.com Change-Id: I5b810c6415c4aa0404e5fa318d2c8db292566b8a Reviewed-on: https://review.coreboot.org/c/coreboot/+/33286 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: ron minnich rminnich@gmail.com Reviewed-by: Patrick Rudolph siro@das-labor.org Reviewed-by: Christian Walter christian.walter@9elements.com Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/include/device/pci_ids.h M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/skylake/bootblock/report_platform.c 3 files changed, 9 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified ron minnich: Looks good to me, approved Felix Held: Looks good to me, approved Patrick Rudolph: Looks good to me, approved Christian Walter: Looks good to me, but someone else must approve
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index a35e134..fd90396 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3076,7 +3076,10 @@ #define PCI_DEVICE_ID_INTEL_SKL_ID_U 0x1904 #define PCI_DEVICE_ID_INTEL_SKL_ID_Y 0x190c #define PCI_DEVICE_ID_INTEL_SKL_ID_ULX 0x1924 +#define PCI_DEVICE_ID_INTEL_SKL_ID_H_2 0x1900 #define PCI_DEVICE_ID_INTEL_SKL_ID_H 0x1910 +#define PCI_DEVICE_ID_INTEL_SKL_ID_S_2 0x190f +#define PCI_DEVICE_ID_INTEL_SKL_ID_S_4 0x191f #define PCI_DEVICE_ID_INTEL_KBL_ID_S 0x590f #define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM 0x1918 #define PCI_DEVICE_ID_INTEL_SKL_ID_DT 0x191f diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 281a7f7..a93db65 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -341,6 +341,9 @@ PCI_DEVICE_ID_INTEL_SKL_ID_Y, PCI_DEVICE_ID_INTEL_SKL_ID_ULX, PCI_DEVICE_ID_INTEL_SKL_ID_H, + PCI_DEVICE_ID_INTEL_SKL_ID_H_2, + PCI_DEVICE_ID_INTEL_SKL_ID_S_2, + PCI_DEVICE_ID_INTEL_SKL_ID_S_4, PCI_DEVICE_ID_INTEL_WHL_ID_Wx2, PCI_DEVICE_ID_INTEL_WHL_ID_Wx4, PCI_DEVICE_ID_INTEL_KBL_ID_S, diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 1e81809..e201a0a 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -53,6 +53,9 @@ { PCI_DEVICE_ID_INTEL_SKL_ID_H, "Skylake-H" }, { PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" }, { PCI_DEVICE_ID_INTEL_SKL_ID_DT, "Skylake-DT" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_H_2, "Skylake-H (2 Core)" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_S_2, "Skylake-S (2 Core)" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_S_4, "Skylake-S (4 Core)" }, { PCI_DEVICE_ID_INTEL_KBL_ID_U, "Kabylake-U" }, { PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"}, { PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" },
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Christian Walter (Code Review) -
Felix Held (Code Review)
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Keno Fischer (Code Review)
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Patrick Rudolph (Code Review)
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ron minnich (Code Review)