Change in coreboot[master]: ChromeOS: Refactor SMBIOS type0 bios_version()

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49281 )

Change subject: ChromeOS: Refactor SMBIOS type0 bios_version()
......................................................................

ChromeOS: Refactor SMBIOS type0 bios_version()

Pointer to an empty string (filled with spaces) is
stored inside GNVS. Rearrange things to avoid having
<chromeos/gnvs.h> in SMBIOS code.

Change-Id: I9405afbea29b896488b4cdd6dd32c4db686fe48c
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49281
Reviewed-by: Lance Zhao
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/acpi/chromeos-gnvs.c
M src/arch/x86/smbios.c
M src/include/smbios.h
3 files changed, 20 insertions(+), 8 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Lance Zhao: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/acpi/chromeos-gnvs.c b/src/acpi/chromeos-gnvs.c
index 8d96769..81c652a 100644
--- a/src/acpi/chromeos-gnvs.c
+++ b/src/acpi/chromeos-gnvs.c
@@ -2,6 +2,7 @@

#include <acpi/acpi_gnvs.h>
 #include <ec/google/chromeec/ec.h>
+#include <smbios.h>
 #include <vendorcode/google/chromeos/gnvs.h>

void gnvs_assign_chromeos(void)
@@ -27,3 +28,13 @@

gnvs_chromeos->vbt2 = ACTIVE_ECFW_RW;
 }
+
+void smbios_type0_bios_version(uintptr_t address)
+{
+	chromeos_acpi_t *gnvs_chromeos = gnvs_chromeos_ptr(acpi_get_gnvs());
+	if (!gnvs_chromeos)
+		return;
+
+	/* Location of smbios_type0.bios_version() string filled with spaces. */
+	gnvs_chromeos->vbt10 = address;
+}
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index aaf989d..3856acf 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -16,9 +16,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_def.h>
 #include <device/pci.h>
-#if CONFIG(CHROMEOS)
-#include <vendorcode/google/chromeos/gnvs.h>
-#endif
 #include <drivers/vpd/vpd.h>
 #include <stdlib.h>

@@ -411,11 +408,12 @@
    t->vendor = smbios_add_string(t->eos, "coreboot");
    t->bios_release_date = smbios_add_string(t->eos, coreboot_dmi_date);

-#if CONFIG(CHROMEOS) && CONFIG(HAVE_ACPI_TABLES)
-	u32 version_offset = (u32)smbios_string_table_len(t->eos);
-	/* SMBIOS offsets start at 1 rather than 0 */
-	chromeos_get_chromeos_acpi()->vbt10 = (uintptr_t)t->eos + (version_offset - 1);
-#endif
+	if (CONFIG(CHROMEOS)) {
+		uintptr_t version_address = (uintptr_t)t->eos;
+		/* SMBIOS offsets start at 1 rather than 0 */
+		version_address += (u32)smbios_string_table_len(t->eos) - 1;
+		smbios_type0_bios_version(version_address);
+	}
    t->bios_version = smbios_add_string(t->eos, get_bios_version());
    uint32_t rom_size = CONFIG_ROM_SIZE;
    rom_size = MIN(CONFIG_ROM_SIZE, 16 * MiB);
diff --git a/src/include/smbios.h b/src/include/smbios.h
index e451d17..d8ac4ca 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -55,6 +55,9 @@
 const char *smbios_chassis_serial_number(void);
 const char *smbios_processor_serial_number(void);

+/* This string could be filled late in payload. */
+void smbios_type0_bios_version(uintptr_t address);
+
 void smbios_ec_revision(uint8_t *ec_major_revision, uint8_t *ec_minor_revision);

unsigned int smbios_memory_error_correction_type(struct memory_info *meminfo);