Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu.
Paul Menzel has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84931?usp=email )
Change subject: mb/google/rauru: Enable ChromeOS EC
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Patch Set 2: Code-Review+1
(1 comment)
File src/mainboard/google/rauru/bootblock.c:
https://review.coreboot.org/c/coreboot/+/84931/comment/8733e51b_b768a88d?usp... :
PS2, Line 20: mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0);
I’d be great if you mentioned the datasheet in the commit message, where it’s specified, that it operates at 3 MHz.
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