Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55534 )
Change subject: soc/amd/cezanne/acpi/mmio: use AOAC offset defines ......................................................................
soc/amd/cezanne/acpi/mmio: use AOAC offset defines
Even though the code is currently commented out, replace the magic numbers with the existing defines.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Id0dbbadf71f2e5a4d23ee998e2aa0a8b67205845 --- M src/soc/amd/cezanne/acpi/mmio.asl 1 file changed, 7 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/55534/1
diff --git a/src/soc/amd/cezanne/acpi/mmio.asl b/src/soc/amd/cezanne/acpi/mmio.asl index 0b4ba78..7b49b85 100644 --- a/src/soc/amd/cezanne/acpi/mmio.asl +++ b/src/soc/amd/cezanne/acpi/mmio.asl @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/amd/common/acpi/aoac.asl> +#include <soc/aoac_defs.h> #include <soc/gpio.h> #include <soc/iomap.h> #include <amdblocks/acpimmio_map.h> @@ -88,7 +89,7 @@ }
// TODO(b/183983959): Enable the AOAC register access later. - // AOAC_DEVICE(11, 0) + // AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0) }
Device (FUR1) { @@ -120,7 +121,7 @@ }
// TODO(b/183983959): Enable the AOAC register access later. - // AOAC_DEVICE(12, 0) + // AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0) }
Device (I2C0) { @@ -157,7 +158,7 @@ }
// TODO(b/183983959): Enable the AOAC register access later. - // AOAC_DEVICE(5, 0) + // AOAC_DEVICE(FCH_AOAC_DEV_I2C0, 0) }
Device (I2C1) { @@ -194,7 +195,7 @@ }
// TODO(b/183983959): Enable the AOAC register access later. - // AOAC_DEVICE(6, 0) + // AOAC_DEVICE(FCH_AOAC_DEV_I2C1, 0) }
Device (I2C2) { @@ -231,7 +232,7 @@ }
// TODO(b/183983959): Enable the AOAC register access later. - // AOAC_DEVICE(7, 0) + // AOAC_DEVICE(FCH_AOAC_DEV_I2C2, 0) }
Device (I2C3) @@ -268,7 +269,7 @@ }
// TODO(b/183983959): Enable the AOAC register access later. - // AOAC_DEVICE(8, 0) + // AOAC_DEVICE(FCH_AOAC_DEV_I2C3, 0) }
Device (MISC)