Hello Lijian Zhao,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/33960
to review the following change.
Change subject: soc/intel/icelake: Fix outb order ......................................................................
soc/intel/icelake: Fix outb order
Similar to CB:33940, fix outb orders.
Change-Id: I1d35235abc7e02e6058f07809b738635861cc9e4 Signed-off-by: Lijian Zhao lijian.zhao@intel.com --- M src/soc/intel/icelake/espi.c 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/33960/1
diff --git a/src/soc/intel/icelake/espi.c b/src/soc/intel/icelake/espi.c index 9ca0c7c..8ab909d 100644 --- a/src/soc/intel/icelake/espi.c +++ b/src/soc/intel/icelake/espi.c @@ -194,10 +194,10 @@
/* Setup NMI on errors, disable SERR */ reg8 = (inb(0x61)) & 0xf0; - outb(0x61, (reg8 | (1 << 2))); + outb((reg8 | (1 << 2)), 0x61);
/* Disable NMI sources */ - outb(0x70, (1 << 7)); + outb((1 << 7), 0x70); };
static void clock_gate_8254(const struct device *dev)
Jeremy Soller has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33960 )
Change subject: soc/intel/icelake: Fix outb order ......................................................................
Patch Set 1: Code-Review+1
Looks good
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33960 )
Change subject: soc/intel/icelake: Fix outb order ......................................................................
Patch Set 1: Code-Review+2
Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33960 )
Change subject: soc/intel/icelake: Fix outb order ......................................................................
soc/intel/icelake: Fix outb order
Similar to CB:33940, fix outb orders.
Change-Id: I1d35235abc7e02e6058f07809b738635861cc9e4 Signed-off-by: Lijian Zhao lijian.zhao@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33960 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Jeremy Soller jackpot51@gmail.com Reviewed-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/icelake/espi.c 1 file changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Jeremy Soller: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/icelake/espi.c b/src/soc/intel/icelake/espi.c index 9ca0c7c..8ab909d 100644 --- a/src/soc/intel/icelake/espi.c +++ b/src/soc/intel/icelake/espi.c @@ -194,10 +194,10 @@
/* Setup NMI on errors, disable SERR */ reg8 = (inb(0x61)) & 0xf0; - outb(0x61, (reg8 | (1 << 2))); + outb((reg8 | (1 << 2)), 0x61);
/* Disable NMI sources */ - outb(0x70, (1 << 7)); + outb((1 << 7), 0x70); };
static void clock_gate_8254(const struct device *dev)
-
Jeremy Soller (Code Review) -
Lance Zhao (Code Review)
-
Martin Roth (Code Review)
-
Subrata Banik (Code Review)