[M] Change in coreboot[main]: soc/mediatek/mt8196: Fix timer reset in BL31

[Yu-Ping Wu (Code Review)]

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin.

Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/83928?usp=email )

Change subject: soc/mediatek/mt8196: Fix timer reset in BL31
......................................................................

Patch Set 21:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/83928/comment/e3c6256f_c4befd9c?usp... :
PS21, Line 11: from
> exceed 72 characters.

Let's rewrite these as:

```
After reboot, the system does not need to serve pending IRQ from
systimer. Therefore, clear systimer IRQ pending bits in init_timer().
For that to work, the systimer compensation version 2.0 needs to be
enabled.
```

File src/soc/mediatek/mt8196/timer_prepare.c:

https://review.coreboot.org/c/coreboot/+/83928/comment/800c8627_ca7899b9?usp... :
PS21, Line 18: void
u32

https://review.coreboot.org/c/coreboot/+/83928/comment/77980f10_5a119247?usp... :
PS21, Line 20: write32(cnttval_con, SYST_CON_IRQ_CLR | SYST_CON_EN);
`setbits32(cnttval_con, SYST_CON_IRQ_CLR)`

https://review.coreboot.org/c/coreboot/+/83928/comment/6a96ad51_cf99abff?usp... :
PS21, Line 29: 	clrbits32p(SYSTIMER_BASE, COMP_FEATURE_MASK);
Actually, we should use `mtk_systimer->cntcr` instead. Here please write

```
struct systimer *const mtk_systimer = (void *)SYSTIMER_BASE;
clrbits32(mtk_systimer->cntcr, ...);
setbits32(mtk_systimer->cntcr, ...);

clear_systimer(mtk_systimer);
```

BTW, can we use a single call `clrsetbits32p` to replace `clrbits32+setbits32`?