Attention is currently required from: Eric Lai, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Naresh Solanki, Raul Rangel.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75829?usp=email )
Change subject: soc/amd/common/iommu.c: Make sure iommu is enabled
......................................................................
Patch Set 5:
(3 comments)
File src/soc/amd/common/block/iommu/iommu.c:
https://review.coreboot.org/c/coreboot/+/75829/comment/670488c8_2bc0befe :
PS3, Line 21: res->flags = IORESOURCE_MEM;
probably something for a separate patch, but shouldn't we add IORESOURCE_PCI64 here too, so that the upper register will also be written by pci_dev_set_resources?
IVRS generation requires access to MMIO region. So this would break 32B code or 64B code without the upper regions mapped (Currently the case).
https://review.coreboot.org/c/coreboot/+/75829/comment/3cf3b01d_609dea7a :
PS3, Line 27: 0x44
would be good to have a define for the iommu pci config space registers 0x44 and 0x48
Done
https://review.coreboot.org/c/coreboot/+/75829/comment/72cfce4e_967a7b74 :
PS3, Line 28: 1
would be good to have a define for the iommu enable bit
Done
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