[S] Change in coreboot[master]: mb/google/brya: Increase Resizable BAR address space limit to 33 bits

[Martin L Roth (Code Review)]

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71282 )

Change subject: mb/google/brya: Increase Resizable BAR address space limit to 33 bits
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mb/google/brya: Increase Resizable BAR address space limit to 33 bits

The dGPU used for some Brya projects requests 33 bits of address
space for one of its BARs via the Resizable BAR mechanism
(requires 6GB).

This Kconfig is currently set at 32 bits for brya, so the allocation currently is capped at 32 bits (4GB). This patch sets the limit to 33
bits for brya boards, which is enough for the GPU.

BUG=b:214443809
TEST=all of the dGPU PCI BARs on agah can be successfully allocated

Change-Id: Ia791be5108fb07a256ae62fc2aee2f057909ef12
Signed-off-by: Tarun Tuli 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71282
Tested-by: build bot (Jenkins) 
Reviewed-by: Subrata Banik 
---
M src/mainboard/google/brya/Kconfig
1 file changed, 24 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Subrata Banik: Looks good to me, approved

diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index b7a44c7..5429d59 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -334,6 +334,6 @@

config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS
    int
-	default 32
+	default 33

endif # BOARD_GOOGLE_BRYA_COMMON