[M] Change in coreboot[main]: arch/riscv: Refactor SMP code

[Maximilian Brune (Code Review)]

Attention is currently required from: Philipp Hug, Ron Minnich.

Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/81082?usp=email )

Change subject: arch/riscv: Refactor SMP code
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Patch Set 5:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/81082/comment/c9569327_4c0dc3a1?usp... :
PS1, Line 8:
> needs updating

Done

File src/arch/riscv/smp.c:

https://review.coreboot.org/c/coreboot/+/81082/comment/3ab3034d_b88bbc3f?usp... :
PS2, Line 56: 			//TODO not sure if we need a timeout here or if the time waiting for smp_resume to be called is enough of a timeout
> take care of that.

Done