Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Kangheui Won has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52751 )
Change subject: [HACK] reduce memory usgae on cezanne psp_verstage ......................................................................
[HACK] reduce memory usgae on cezanne psp_verstage
For now we only have 80KB for psp_verstage in cezanne. (it's 160KB for picasso). So we have to trim down various things to fit into 80KB space.
Signed-off-by: Kangheui Won khwon@chromium.org Change-Id: I30730a6dc53e2449981c635ecfe63029c73e58ee --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/common/psp_verstage/Makefile.inc 2 files changed, 10 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/52751/1
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 3b9bb5f..eedf68c 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -64,6 +64,7 @@ select UDK_2017_BINDING select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI + select NO_CBFS_MCACHE if VBOOT_STARTS_BEFORE_BOOTBLOCK
config SOC_AMD_COMMON_BLOCK_UCODE_SIZE default 5568 @@ -116,6 +117,7 @@
config PRERAM_CBMEM_CONSOLE_SIZE hex + default 0x100 if VBOOT_STARTS_BEFORE_BOOTBLOCK default 0x1600 help Increase this value if preram cbmem console is getting truncated @@ -388,7 +390,7 @@
config VBOOT_HASH_BLOCK_SIZE hex - default 0x9000 + default 0x100 depends on VBOOT_STARTS_BEFORE_BOOTBLOCK help Because the bulk of the time in psp_verstage to hash the RO cbfs is diff --git a/src/soc/amd/common/psp_verstage/Makefile.inc b/src/soc/amd/common/psp_verstage/Makefile.inc index 406d28b..7dc2acd 100644 --- a/src/soc/amd/common/psp_verstage/Makefile.inc +++ b/src/soc/amd/common/psp_verstage/Makefile.inc @@ -6,7 +6,11 @@ CPPFLAGS_common += -I$(VBOOT_SOURCE)/firmware/2lib/include/
# This size should match the size in the linker script. +ifneq ($(CONFIG_SOC_AMD_CEZANNE),y) CFLAGS_arm += -Wstack-usage=40960 +else +CFLAGS_arm += -Wstack-usage=4096 +endif
verstage-y += delay.c verstage-y += fch.c @@ -15,9 +19,12 @@ verstage-y += printk.c verstage-y += psp_verstage.c verstage-y += psp.c +ifneq ($(CONFIG_SOC_AMD_CEZANNE),y) +# cezanne PSP does not support these functions yet verstage-y += reset.c verstage-y += timer.c verstage-y += vboot_crypto.c +endif
$(obj)/psp_verstage.bin: $(objcbfs)/verstage.elf $(OBJCOPY_verstage) -O binary $^ $@