Change in coreboot[master]: nb/i945: Fix typo

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37518 )

Change subject: nb/i945: Fix typo
......................................................................

nb/i945: Fix typo

Change-Id: I082ac2c1c13cbe6835a02d703f8651e837a43f37
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/memmap.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/37518/1

diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c
index 000ac7e..5414120 100644
--- a/src/northbridge/intel/i945/memmap.c
+++ b/src/northbridge/intel/i945/memmap.c
@@ -55,7 +55,7 @@
    else
    	tom = (pci_read_config8(PCI_DEV(0, 0, 0), TOLUD) & 0xf7) << 24;

-	/* subsctract TSEG size */
+	/* subtract TSEG size */
    tom -= decode_tseg_size(pci_read_config8(PCI_DEV(0, 0, 0), ESMRAMC));
    return tom;
 }

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37518 )

Change subject: nb/i945: Fix typo
......................................................................

Patch Set 1: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37518 )

Change subject: nb/i945: Fix typo
......................................................................

nb/i945: Fix typo

Change-Id: I082ac2c1c13cbe6835a02d703f8651e837a43f37
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37518
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/northbridge/intel/i945/memmap.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c
index 000ac7e..5414120 100644
--- a/src/northbridge/intel/i945/memmap.c
+++ b/src/northbridge/intel/i945/memmap.c
@@ -55,7 +55,7 @@
    else
    	tom = (pci_read_config8(PCI_DEV(0, 0, 0), TOLUD) & 0xf7) << 24;

-	/* subsctract TSEG size */
+	/* subtract TSEG size */
    tom -= decode_tseg_size(pci_read_config8(PCI_DEV(0, 0, 0), ESMRAMC));
    return tom;
 }