[XS] Change in coreboot[main]: src/soc/intel/cmn/blk/cse: Log cse sync information

[Dinesh Gehlot (Code Review)]

Attention is currently required from: Kapil Porwal, Karthik Ramasubramanian, Paul Menzel, Subrata Banik.

Dinesh Gehlot has posted comments on this change by Dinesh Gehlot. ( https://review.coreboot.org/c/coreboot/+/85219?usp=email )

Change subject: src/soc/intel/cmn/blk/cse: Log cse sync information
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Patch Set 2:

(3 comments)

Patchset:

PS1:
> there should be an equivalent change in payload as well.

Yes, CL:6038473 has already been raised but is being kept as WIP until the coreboot changes reach downstream.

Commit Message:

https://review.coreboot.org/c/coreboot/+/85219/comment/3c7642cc_60ec6b65?usp... :
PS1, Line 14: TEST=elog verified on rex0
> Paste an example of the new log lines?

Acknowledged

File src/soc/intel/common/block/cse/cse_lite.c:

https://review.coreboot.org/c/coreboot/+/85219/comment/1f26c11e_6540dde5?usp... :
PS1, Line 838: if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_IN_RAMSTAGE))
             : 		elog_add_event_byte(ELOG_TYPE_FW_CSE_SYNC, ELOG_FW_RAMSTAGE_CSE_SYNC);
             : 	else
             : 		elog_add_event_byte(ELOG_TYPE_FW_CSE_SYNC, ELOG_FW_ROMSTAGE_CSE_SYNC);
> `elog_add_event_byte(ELOG_TYPE_FW_CSE_SYNC, ENV_RAMSTAGE ? ... […]

Acknowledged