Change in coreboot[master]: mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil
Hello Lucas Chen, Chris Wang,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/42217
to review the following change.
Change subject: mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil ......................................................................
mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil
Add UPD xhci0_force_gen1 for Trembyle and Ezkinil. The default setting is set to disable. and set enabled for Ezkinil.
BUG=b:156314787 BRANCH=trembyle-bringup TEST=Build. Verified the setting will be applied on Ezkinil/Trembyle.
Signed-off-by: Lucas Chen lucas.chen@quanta.corp-partner.google.com Change-Id: I65d06bfe379f9e42101bfae1a02a619ee2f24052 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+... Reviewed-by: Furquan Shaikh furquan@chromium.org --- M src/mainboard/google/zork/variants/baseboard/devicetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb 2 files changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/42217/1
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree.cb b/src/mainboard/google/zork/variants/baseboard/devicetree.cb index 664e379..650418f 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree.cb @@ -48,6 +48,8 @@
register "sd_emmc_config" = "SD_EMMC_EMMC_HS400"
+ register "xhci0_force_gen1" = "0" + # SPI Configuration register "common_config.spi_config" = "{ .normal_speed = SPI_SPEED_66M, /* MHz */ diff --git a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb index c208dae..f7366ac 100644 --- a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb +++ b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb @@ -22,6 +22,8 @@
# End : OPN Performance Configuration
+ register "xhci0_force_gen1" = "1" + # Enable I2C2 for trackpad, touchscreen, pen at 400kHz register "i2c[2]" = "{ .speed = I2C_SPEED_FAST,
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42217 )
Change subject: mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42217/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42217/1//COMMIT_MSG@10 PS1, Line 10: The default setting is set to disable. and set enabled for Ezkinil. Please replace the dot/period by a comma.
Please add an explanation for the discrepancy of the settings for both boards.
https://review.coreboot.org/c/coreboot/+/42217/1//COMMIT_MSG@14 PS1, Line 14: TEST=Build. Verified the setting will be applied on Ezkinil/Trembyle. How?
Hello build bot (Jenkins), Furquan Shaikh, Lucas Chen, Chris Wang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42217
to look at the new patch set (#2).
Change subject: mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil ......................................................................
mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil
Add UPD xhci0_force_gen1 for Trembyle and Ezkinil. The default setting is set to disable, and set enabled for Ezkinil. Trambyle -> set default as disable. Ezkinil -> set enable by request.
BUG=b:156314787 BRANCH=trembyle-bringup TEST=Build. Verified the setting will be applied on Ezkinil/Trembyle.
Signed-off-by: Lucas Chen lucas.chen@quanta.corp-partner.google.com Change-Id: I65d06bfe379f9e42101bfae1a02a619ee2f24052 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+... Reviewed-by: Furquan Shaikh furquan@chromium.org --- M src/mainboard/google/zork/variants/baseboard/devicetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb 2 files changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/42217/2
chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42217 )
Change subject: mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42217/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42217/1//COMMIT_MSG@10 PS1, Line 10: The default setting is set to disable. and set enabled for Ezkinil.
Please replace the dot/period by a comma. […]
Done
https://review.coreboot.org/c/coreboot/+/42217/1//COMMIT_MSG@14 PS1, Line 14: TEST=Build. Verified the setting will be applied on Ezkinil/Trembyle.
How?
Check the device speed and check the coreboot logs which applied to set to SMU.
Eric Peers has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42217 )
Change subject: mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil ......................................................................
Patch Set 3: Code-Review+1
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42217 )
Change subject: mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil ......................................................................
Patch Set 3: Code-Review+2
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42217 )
Change subject: mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil ......................................................................
Patch Set 5: Code-Review+2
Chris Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42217 )
Change subject: mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42217/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42217/1//COMMIT_MSG@14 PS1, Line 14: TEST=Build. Verified the setting will be applied on Ezkinil/Trembyle.
Check the device speed and check the coreboot logs which applied to set to SMU.
Done
Marshall Dawson has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42217 )
Change subject: mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil ......................................................................
mb/google/zork: Add UPD xhci0_force_gen1 for Trembyle and Ezkinil
Add UPD xhci0_force_gen1 for Trembyle and Ezkinil. The default setting is set to disable, and set enabled for Ezkinil. Trambyle -> set default as disable. Ezkinil -> set enable by request.
BUG=b:156314787 BRANCH=trembyle-bringup TEST=Build. Verified the setting will be applied on Ezkinil/Trembyle.
Signed-off-by: Lucas Chen lucas.chen@quanta.corp-partner.google.com Change-Id: I65d06bfe379f9e42101bfae1a02a619ee2f24052 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+... Reviewed-by: Furquan Shaikh furquan@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/42217 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-by: Eric Peers epeers@google.com Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/zork/variants/baseboard/devicetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb 2 files changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Marshall Dawson: Looks good to me, approved Eric Peers: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree.cb b/src/mainboard/google/zork/variants/baseboard/devicetree.cb index 18c3783..3cc311b 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree.cb @@ -48,6 +48,8 @@
register "sd_emmc_config" = "SD_EMMC_EMMC_HS400"
+ register "xhci0_force_gen1" = "0" + # SPI Configuration register "common_config.spi_config" = "{ .normal_speed = SPI_SPEED_66M, /* MHz */ diff --git a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb index c208dae..f7366ac 100644 --- a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb +++ b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb @@ -22,6 +22,8 @@
# End : OPN Performance Configuration
+ register "xhci0_force_gen1" = "1" + # Enable I2C2 for trackpad, touchscreen, pen at 400kHz register "i2c[2]" = "{ .speed = I2C_SPEED_FAST,
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Chris Wang (Code Review) -
chris wang (Code Review)
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Eric Peers (Code Review)
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Furquan Shaikh (Code Review)
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Marshall Dawson (Code Review)
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Paul Menzel (Code Review)