[L] Change in coreboot[master]: soc/amd/block/ivrs: Generalize IVRS table generation

[Arthur Heymans (Code Review)]

Attention is currently required from: Felix Held, Felix Singer, Fred Reitberger, Jason Glenesk, Marvin Drees, Matt DeVillier, Naresh Solanki, Raul Rangel.

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75451?usp=email )

Change subject: soc/amd/block/ivrs: Generalize IVRS table generation
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Patch Set 7:

(1 comment)

File src/soc/amd/common/block/acpi/ivrs.c:

https://review.coreboot.org/c/coreboot/+/75451/comment/83c9cd0b_8e58769c :
PS7, Line 262: /* Find EMMC */
             : 	if (!nb_dev->bus)
             : 		dev = pcidev_path_behind(nb_dev->bus, PCI_DEVFN(0x13, 1));
> Previously, the entry was added without any conditions.
> It seems that the assumption was made that it is always present.
> However, based on my understanding, this entry should only be relevant if the device is present.
> I'm uncertain if adding it without any conditions would be appropriate.
> Please let me know your thoughts. Will align it accordingly.
> Thanks.

I don't see any 13.1 device present on any AMD devicetree. I'm not sure if D0x13,F0x1 has any meaning. I guess keeping the behavior to unconditionally add it is the way to go?