Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger.
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74656 )
Change subject: soc/amd/*/include/pci_devs: fix copy-paste error in PCIE_ABC_C_DEVFN ......................................................................
soc/amd/*/include/pci_devs: fix copy-paste error in PCIE_ABC_C_DEVFN
Since it's an internal bus, it's PCIE_ABC_C_DEVFN and not PCIE_GPP_C_DEVFN. This also makes it consistent with the rest of the internal PCI buses.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Ica8b666161c3cd3b0b4a29f8a4b0aff473b4d833 --- M src/soc/amd/cezanne/include/soc/pci_devs.h M src/soc/amd/glinda/include/soc/pci_devs.h M src/soc/amd/glinda/xhci.c M src/soc/amd/mendocino/include/soc/pci_devs.h M src/soc/amd/mendocino/xhci.c M src/soc/amd/phoenix/include/soc/pci_devs.h 6 files changed, 20 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/74656/1
diff --git a/src/soc/amd/cezanne/include/soc/pci_devs.h b/src/soc/amd/cezanne/include/soc/pci_devs.h index 8f5793b..2337e0c 100644 --- a/src/soc/amd/cezanne/include/soc/pci_devs.h +++ b/src/soc/amd/cezanne/include/soc/pci_devs.h @@ -108,7 +108,7 @@ #define SATA1_DEVFN PCI_DEVFN(SATA1_DEV, SATA1_FUNC)
#define PCIE_ABC_C_FUNC 3 -#define PCIE_GPP_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) +#define PCIE_ABC_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define SOC_PCIE_GPP_C_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC)
/* SMBUS */ diff --git a/src/soc/amd/glinda/include/soc/pci_devs.h b/src/soc/amd/glinda/include/soc/pci_devs.h index 4e0bf9d..a37d3ee 100644 --- a/src/soc/amd/glinda/include/soc/pci_devs.h +++ b/src/soc/amd/glinda/include/soc/pci_devs.h @@ -86,7 +86,7 @@ #define SOC_PCIE_GPP_B_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_B_FUNC)
#define PCIE_ABC_C_FUNC 3 -#define PCIE_GPP_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) +#define PCIE_ABC_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define SOC_PCIE_GPP_C_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC)
#define XHCI2_DEV 0x0 diff --git a/src/soc/amd/glinda/xhci.c b/src/soc/amd/glinda/xhci.c index 78ca94f..dad5593 100644 --- a/src/soc/amd/glinda/xhci.c +++ b/src/soc/amd/glinda/xhci.c @@ -48,7 +48,7 @@ *gpe = xhci_sci_sources[1].gpe; return CB_SUCCESS; } - } else if (dev->bus->dev->path.pci.devfn == PCIE_GPP_C_DEVFN) { + } else if (dev->bus->dev->path.pci.devfn == PCIE_ABC_C_DEVFN) { if (dev->path.pci.devfn == XHCI2_DEVFN && dev->device == PCI_DID_AMD_FAM17H_MODELA0H_XHCI2) { *gpe = xhci_sci_sources[2].gpe; diff --git a/src/soc/amd/mendocino/include/soc/pci_devs.h b/src/soc/amd/mendocino/include/soc/pci_devs.h index 14c8300..2c81a5b 100644 --- a/src/soc/amd/mendocino/include/soc/pci_devs.h +++ b/src/soc/amd/mendocino/include/soc/pci_devs.h @@ -84,7 +84,7 @@ #define SOC_PCIE_GPP_B_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_B_FUNC)
#define PCIE_ABC_C_FUNC 3 -#define PCIE_GPP_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) +#define PCIE_ABC_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define SOC_PCIE_GPP_C_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC)
#define XHCI2_DEV 0x0 diff --git a/src/soc/amd/mendocino/xhci.c b/src/soc/amd/mendocino/xhci.c index 720cc76..e564991 100644 --- a/src/soc/amd/mendocino/xhci.c +++ b/src/soc/amd/mendocino/xhci.c @@ -49,7 +49,7 @@ *gpe = xhci_sci_sources[1].gpe; return CB_SUCCESS; } - } else if (dev->bus->dev->path.pci.devfn == PCIE_GPP_C_DEVFN) { + } else if (dev->bus->dev->path.pci.devfn == PCIE_ABC_C_DEVFN) { if (dev->path.pci.devfn == XHCI2_DEVFN && dev->device == PCI_DID_AMD_FAM17H_MODELA0H_XHCI2) { *gpe = xhci_sci_sources[2].gpe; diff --git a/src/soc/amd/phoenix/include/soc/pci_devs.h b/src/soc/amd/phoenix/include/soc/pci_devs.h index 0dde0ba..cd7ad08 100644 --- a/src/soc/amd/phoenix/include/soc/pci_devs.h +++ b/src/soc/amd/phoenix/include/soc/pci_devs.h @@ -104,7 +104,7 @@ #define GFX_IPU_DEVFN PCI_DEVFN(GFX_IPU_DEV, GFX_IPU_FUNC)
#define PCIE_ABC_C_FUNC 3 -#define PCIE_GPP_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) +#define PCIE_ABC_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define SOC_PCIE_GPP_C_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC)
#define USB4_XHCI0_DEV 0x0