[S] Change in coreboot[main]: soc/intel/xeon_sp: Report PCIe integrated end points under DRHD

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu.

Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/84315?usp=email )

Change subject: soc/intel/xeon_sp: Report PCIe integrated end points under DRHD
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Patch Set 2:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84315/comment/59c51ba8_931df69a?usp... :
PS1, Line 7: RCiEPs
> What are RCiEPs?

RCiEP is root complex integrated end points. I used PCIe integrated end points to be more straightforward.