Attention is currently required from: Subrata Banik, Sridhar Siricilla.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62986 )
Change subject: soc/intel/common: Add APIs to check CSE's write protection info
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/common/block/spi/spi.c:
https://review.coreboot.org/c/coreboot/+/62986/comment/0cd4481f_fcb8ec13
PS3, Line 53: #if ENV_RAMSTAGE
This is not required.
Done
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