[S] Change in coreboot[master]: mb/google/rex: Disable TBT PCIe rp1 and rp3 root ports

[John Zhao (Code Review)]

Attention is currently required from: Tarun Tuli, John Zhao, Kapil Porwal, Ivy Jian, Eric Lai.

Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Kapil Porwal, Ivy Jian, Eric Lai,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/68854

to look at the new patch set (#3).

Change subject: mb/google/rex: Disable TBT PCIe rp1 and rp3 root ports
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mb/google/rex: Disable TBT PCIe rp1 and rp3 root ports

Extra memory resource allocation is needed for bridge once a TBT PCIe
root port is enabled to support the hot plug feature. There is report
that touch screen device is not probed once all 4 ports are enabled.
This change disables the TBT PCIe rp1 and rp3  since they are not used.

BUG=b:254207628
TEST=Booted to OS and queried input device events via evtest. Verified
the touch screen ELAN6918 was shown up.

Change-Id: Ia5c1d657c0ad0482619d739f8949bc9168eac25b
Signed-off-by: zhaojohn 
---
M src/mainboard/google/rex/variants/rex0/overridetree.cb
1 file changed, 19 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/68854/3