Change in coreboot[master]: soc/intel/common/cse: Add function to perform CSE lock configuration

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Subrata Banik, Sridhar Siricilla, Werner Zeh, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61520 )

Change subject: soc/intel/common/cse: Add function to perform CSE lock configuration
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Patch Set 6:

(1 comment)

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/61520/comment/4e051ab5_24e43bf3 
PS6, Line 1018: (cse_is_hfs1_com_normal() || cse_is_hfs1_com_soft_temp_disable())
> I mean what is the need for conditions ((cse_is_hfs1_com_normal() || cse_is_hfs1_com_soft_temp_disab […]

The idea is to check for a "manufacturing environment" indirectly via either CSME having HFSTS1 bit 4 being cleared, and thus leaving the payload the possibility to trigger global resets, but when bit 4 is set, to disable global resets from being able to be triggered.