Patch set updated for coreboot: 29a81d1 urara: Select CONSOLE_SERIAL

[Stefan Reinauer]

Stefan Reinauer ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9186

-gerrit

commit 29a81d123b0e6c2d6a2b7f7a4c213d635d9389dd
Author: Ionela Voinescu 
Date:   Fri Oct 31 17:55:59 2014 +0000

urara: Select CONSOLE_SERIAL

CONSOLE_SERIAL selected in Pistachio configuration
    file; configuration needed to enable UART.

BUG=chrome-os-partner:31438
    TEST=built urara bootblock and ran it on the Pistachio FPGA,
         observed exepected console output
    BRANCH=none

Change-Id: I1a56ae34ce553e66b4d18f0561ca4b3287863d1e
    Signed-off-by: Stefan Reinauer 
    Original-Commit-Id: f9a83da568e5cfb4c377f3b33a8ce11a7d8d0bd5
    Original-Change-Id: I4947ea8608593ec3f44e336ebdf3930f44493ec9
    Original-Signed-off-by: Ionela Voinescu 
    Original-Reviewed-on: https://chromium-review.googlesource.com/226841
    Original-Reviewed-by: David Hendricks 
---
 src/soc/imgtec/pistachio/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig
index 83408bd..183c457 100644
--- a/src/soc/imgtec/pistachio/Kconfig
+++ b/src/soc/imgtec/pistachio/Kconfig
@@ -24,6 +24,7 @@ config CPU_IMGTEC_PISTACHIO
    select DYNAMIC_CBMEM
    select GENERIC_UDELAY
    select HAVE_MONOTONIC_TIMER
+	select CONSOLE_SERIAL
    select HAVE_UART_MEMORY_MAPPED
    select HAVE_UART_SPECIAL
    select SPI_ATOMIC_SEQUENCING