[XS] Change in coreboot[main]: device/pci_ids: Add new Intel PTL device IDs for XDCI

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83518?usp=email )

Change subject: device/pci_ids: Add new Intel PTL device IDs for XDCI
......................................................................

device/pci_ids: Add new Intel PTL device IDs for XDCI

This patch adds new XDCI PCI device IDs for Intel PTL-U
and PTL-H.

Additionally, updates the XDCI driver's `pci_device_ids` list to
include these new IDs.

Finally, dropped unused TCSS XDCI PCI IDs.

Source: Intel PTL-EDS vol 1. Document Number 815002, Rev 0.51 Chapter 2

BUG=b:347669091
TEST=Able to build google/fatcat.

Change-Id: I51196401904e2402ac7669fa852a541bb7c2d453
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83518
Reviewed-by: Eric Lai 
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/xdci/xdci.c
2 files changed, 4 insertions(+), 1 deletion(-)

Approvals:
  Angel Pons: Looks good to me, but someone else must approve
  Eric Lai: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 445658f..e18a2fb 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4704,7 +4704,8 @@
 #define PCI_DID_INTEL_MTL_XDCI			0x7e7e
 #define PCI_DID_INTEL_MTL_M_TCSS_XDCI		0x7eb1
 #define PCI_DID_INTEL_MTL_P_TCSS_XDCI		0x7ec1
-#define PCI_DID_INTEL_PTL_TCSS_XDCI		0xe432
+#define PCI_DID_INTEL_PTL_H_XDCI		0xe47e
+#define PCI_DID_INTEL_PTL_U_H_XDCI		0xe37e

/* Intel SD device Ids */
 #define PCI_DID_INTEL_LPT_LP_SD			0x9c35
diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c
index 7ee2dbb..86625da 100644
--- a/src/soc/intel/common/block/xdci/xdci.c
+++ b/src/soc/intel/common/block/xdci/xdci.c
@@ -28,6 +28,8 @@
 };

static const unsigned short pci_device_ids[] = {
+	PCI_DID_INTEL_PTL_H_XDCI,
+	PCI_DID_INTEL_PTL_U_H_XDCI,
    PCI_DID_INTEL_MTL_XDCI,
    PCI_DID_INTEL_APL_XDCI,
    PCI_DID_INTEL_CNL_LP_XDCI,