Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu.
Hello Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Tim Chu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83538?usp=email
to look at the new patch set (#2).
The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)
Change subject: soc/intel/xeon_sp: Reserve FSP MMIO high window ......................................................................
soc/intel/xeon_sp: Reserve FSP MMIO high window
Xeon-SP supports MMIO high window, a.k.a. MMIO window above 4G. FSP will assign MMIO high ranges to domains as domain MMIO high windows. However, there will be unassigned parts among domain windows for non-domain usage, which will cause segmentation in MTRR UC coverage.
Reserve MMIO high as a whole under domain0/00:0.0. During MTRR calculation, this MMIO high reservation will connect the discontinued domain high MMIO windows together to form one continuous range and to save MTRR usage from inadequacy.
Change-Id: Ib2a0e1f1f13e797c1fab6aca589d060c4d3fa15b Signed-off-by: Shuo Liu shuo.liu@intel.com --- M src/soc/intel/xeon_sp/cpx/soc_util.c M src/soc/intel/xeon_sp/gnr/soc_util.c M src/soc/intel/xeon_sp/include/soc/util.h M src/soc/intel/xeon_sp/skx/soc_util.c M src/soc/intel/xeon_sp/spr/soc_util.c M src/soc/intel/xeon_sp/uncore.c 6 files changed, 50 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/83538/2