Hello Piotr Kleinschmidt,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/38274
to review the following change.
Change subject: mb/pcengines: Enable SuperIO LDN 0xf for GPIO soft reset ......................................................................
mb/pcengines: Enable SuperIO LDN 0xf for GPIO soft reset
LDN 0xf keeps registers with open-drain configuration of the GPIO. Enabling the LDN is required for proper GPIO soft reset operation by the SuperIO driver.
Signed-off-by: Piotr Kleinschmidt piotr.kleinschmidt@3mdeb.com Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com Change-Id: Ia769e3d8e66015297942bddf328a6fde0bb27ce6 --- M src/mainboard/pcengines/apu1/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb 4 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/38274/1
diff --git a/src/mainboard/pcengines/apu1/devicetree.cb b/src/mainboard/pcengines/apu1/devicetree.cb index 2e8b8f4..d7c7952 100644 --- a/src/mainboard/pcengines/apu1/devicetree.cb +++ b/src/mainboard/pcengines/apu1/devicetree.cb @@ -63,12 +63,12 @@ irq 0x70 = 3 end device pnp 2e.8 off end - device pnp 2e.f off end # GPIO0 and GPIO1 are conditionally turned on device pnp 2e.007 off end device pnp 2e.107 off end device pnp 2e.607 off end device pnp 2e.e off end + device pnp 2e.f on end end chip drivers/pc80/tpm device pnp 0c31.0 on end diff --git a/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb index 6728228..b888ae7 100644 --- a/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb +++ b/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb @@ -65,12 +65,12 @@ irq 0x70 = 3 end device pnp 2e.8 off end - device pnp 2e.f off end # GPIO0 and GPIO1 are conditionally turned on device pnp 2e.007 on end device pnp 2e.107 on end device pnp 2e.607 off end device pnp 2e.e off end + device pnp 2e.f on end end # SIO NCT5104D chip drivers/pc80/tpm device pnp 0c31.0 on end diff --git a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb index 0c0c21e..ad29965 100644 --- a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb +++ b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb @@ -65,12 +65,12 @@ irq 0x70 = 3 end device pnp 2e.8 off end - device pnp 2e.f off end # GPIO0 and GPIO1 are conditionally turned on device pnp 2e.007 on end device pnp 2e.107 on end device pnp 2e.607 off end device pnp 2e.e off end + device pnp 2e.f on end end # SIO NCT5104D end # LPC 0x439d
diff --git a/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb index c93c04f..c5b20c9 100644 --- a/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb +++ b/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb @@ -65,12 +65,12 @@ irq 0x70 = 3 end device pnp 2e.8 off end - device pnp 2e.f off end # GPIO0 and GPIO1 are conditionally turned on device pnp 2e.007 on end device pnp 2e.107 on end device pnp 2e.607 off end device pnp 2e.e off end + device pnp 2e.f on end end # SIO NCT5104D end # LPC 0x439d
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38274 )
Change subject: mb/pcengines: Enable SuperIO LDN 0xf for GPIO soft reset ......................................................................
Patch Set 1: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38274 )
Change subject: mb/pcengines: Enable SuperIO LDN 0xf for GPIO soft reset ......................................................................
mb/pcengines: Enable SuperIO LDN 0xf for GPIO soft reset
LDN 0xf keeps registers with open-drain configuration of the GPIO. Enabling the LDN is required for proper GPIO soft reset operation by the SuperIO driver.
Signed-off-by: Piotr Kleinschmidt piotr.kleinschmidt@3mdeb.com Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com Change-Id: Ia769e3d8e66015297942bddf328a6fde0bb27ce6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38274 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/mainboard/pcengines/apu1/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb 4 files changed, 4 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved
diff --git a/src/mainboard/pcengines/apu1/devicetree.cb b/src/mainboard/pcengines/apu1/devicetree.cb index 2e8b8f4..d7c7952 100644 --- a/src/mainboard/pcengines/apu1/devicetree.cb +++ b/src/mainboard/pcengines/apu1/devicetree.cb @@ -63,12 +63,12 @@ irq 0x70 = 3 end device pnp 2e.8 off end - device pnp 2e.f off end # GPIO0 and GPIO1 are conditionally turned on device pnp 2e.007 off end device pnp 2e.107 off end device pnp 2e.607 off end device pnp 2e.e off end + device pnp 2e.f on end end chip drivers/pc80/tpm device pnp 0c31.0 on end diff --git a/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb index 6728228..b888ae7 100644 --- a/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb +++ b/src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb @@ -65,12 +65,12 @@ irq 0x70 = 3 end device pnp 2e.8 off end - device pnp 2e.f off end # GPIO0 and GPIO1 are conditionally turned on device pnp 2e.007 on end device pnp 2e.107 on end device pnp 2e.607 off end device pnp 2e.e off end + device pnp 2e.f on end end # SIO NCT5104D chip drivers/pc80/tpm device pnp 0c31.0 on end diff --git a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb index 0c0c21e..ad29965 100644 --- a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb +++ b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb @@ -65,12 +65,12 @@ irq 0x70 = 3 end device pnp 2e.8 off end - device pnp 2e.f off end # GPIO0 and GPIO1 are conditionally turned on device pnp 2e.007 on end device pnp 2e.107 on end device pnp 2e.607 off end device pnp 2e.e off end + device pnp 2e.f on end end # SIO NCT5104D end # LPC 0x439d
diff --git a/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb index c93c04f..c5b20c9 100644 --- a/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb +++ b/src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb @@ -65,12 +65,12 @@ irq 0x70 = 3 end device pnp 2e.8 off end - device pnp 2e.f off end # GPIO0 and GPIO1 are conditionally turned on device pnp 2e.007 on end device pnp 2e.107 on end device pnp 2e.607 off end device pnp 2e.e off end + device pnp 2e.f on end end # SIO NCT5104D end # LPC 0x439d
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38274 )
Change subject: mb/pcengines: Enable SuperIO LDN 0xf for GPIO soft reset ......................................................................
Patch Set 2:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : No test failed. EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : No test failed. EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : No test failed.
Please note: This test is under development and might not be accurate at all!
-
9elements QA (Code Review) -
Felix Held (Code Review)
-
Michał Żygowski (Code Review)